[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v10 09/25] x86: refactor psr: L3 CAT: set value: implement framework.
>>> On 20.04.17 at 18:52, <lars.kurth.xen@xxxxxxxxx> wrote: > So to summarise: > > On item 1: it appears that you are looking for a some more justification why > some of the changes were made, maybe with a rationale for some of the choices > that were made. Given that this is quite a complex series which has diverged > quite a lot from the design, the goal is to make it easier for either you (or > someone else) to sanity check the proposal which on the face of things look > OK. But you have some doubts and you can't easily check against the design as > it is out-of-date. > > On item 2: you think something may not be quite right, but you can't really > decide until a couple of questions (not quite sure which, but I am sure Yi > can locate them) are answered. > > Let me know whether this is actually true. Well, afaict both actually boil down to the same single question regarding the special handling of CAT MSRs after onlining (at runtime) a core on a socket all of whose cores had been offline, namely considering that other CPU registers don't require any such special treatment (in context switch code or elsewhere). As to the design possibly being out of date - I have to admit I didn't even check whether the accompanying documentation has been kept up to date with the actual code changes. The matter here really isn't with comparing with the design, but rather whether the design choice (written down or not) was an appropriate one. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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