[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 2/2] arch: arm64: always set IL=1 when injecting an abort exception


  • To: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: "Orzel, Michal" <michal.orzel@xxxxxxx>
  • Date: Fri, 14 Feb 2025 09:50:10 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=NT9Az1/2T/UcS9uEllAkfv+ZhM6H/8lKAghc46lxkvc=; b=agNPxb/PFtgy6O4Mar+6Z5ESg+X4qnIlodn3S4nuvdaF75imbcx+erE0YBYjGbkvp46aAzobTrEZ2QNbDKF2kos2i8Y7KFAl/jKM9Ksw4LdtNpgfmIbEJKAswG/tyZtN74DBeBWgAB3OI0bUNGQqS/QS7KB+fMmIf9kRY50oiota4UTecZHPcrwug/MTxhXH7mY58oNEMrO6azi8HFeJ2jsiDBlZGUwTea9hxK8MIpgI8Mq9JTdiR6XYt/th+ijv44Pf7BXIigh/WhG4HlgVv23nYLTDjdotfkGyI63S75FhGJ2HSQoY+TCZefVM/HhADQNH88dyW0Q4BOx9HocS4A==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=QadfnEOBDwJzgzdqo3+WUxp7I6mXUSIFoUa+RuIR4fxEYPU4kH8hi36I1M3tm4YBoV8+p8I5PCAUhyuiWqC28zePkny5gfA5IiQMgQ6iaHQi8LcLmNi0O+zGbj1755U/fLKNFWPnoZVSStxanGAY8aj6mOD6cqEieKxWHrSAIKL6ZtKk1V7Ikt4K+i8h1lGZS3LkVqguU6GdYHerV+1/UklxrZi3NQzRDYifGw4kEywCKa1hWYmZWKB5no/EerJFtl68AcHLi1X9Lh1aRj6/igyUb0/TwSkIfKhcsHrPpfAeKY77RDfrwFwqsvFspipcRn15YX/DUOoGHO57SLpEDw==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com;
  • Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>
  • Delivery-date: Fri, 14 Feb 2025 08:50:32 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>


On 13/02/2025 16:37, Volodymyr Babchuk wrote:
> 
> 
> ARM Architecture Reference Manual states that IL field of ESR_EL1
> register should be 1 in some cases, and all these cases are covered by
> inject_abt64_exception()
> 
> Section D24.2.40, page D24-7337 of ARM DDI 0487L:
> 
>   IL, bit [25]
>   Instruction Length for synchronous exceptions. Possible values of this bit 
> are:
> 
>   [...]
> 
>   0b1 - 32-bit instruction trapped.
>   This value is also used when the exception is one of the following:
>   [...]
>    - An Instruction Abort exception.
>    - A Data Abort exception for which the value of the ISV bit is 0.
>   [...]
> 
> inject_abt64_exception() function injects either Instruction Abort or
> Data Abort exception. In both cases, ISS is 0, which means that ISV
> bit is 0 as well. Thus, IL must be set to 1 unconditionally.
> 
> To align code with the specification, set .len field to 1 in
> inject_abt64_exception() and remove unneeded third parameter.
> 
> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@xxxxxxxx>
Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>

~Michal




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.