[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v2 2/2] arch: arm64: always set IL=1 when injecting an abort exception


  • To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Date: Thu, 13 Feb 2025 15:37:55 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5dxQkqz6IteHjS+Vk9HyCGR6dBrUE8NGLox/Z/hxaYQ=; b=EcZyvBbd4kGDFvcu4JGh29EZHYQjjN4vQ8RS+7vSqDgPvuXOMZnH9Lekp0kvofBz5tZ55wdgJCB/yHtbOaLrIQMeC18WUBZE32b2YnPvNeEFgcNGNc7ZsGyTQMnXFHP3/ASl9eSywdugZN95Oh8oLQCV9vDc7UbF/9z2xdcGmeYzCUXSVqfZvy10PuNjIEtJlQ3AHoUp/jp25Rl3W6T+PUc2RDFVAXg5c2CpWa1tyNTo0/K6Ivx5pZ0+/TdTAaUiasIsp6rbB8Y+QN+NGBotA+rq2q2rxzPxT1Q7w27aMi2pJWQIT5pxoBnV1hkodqiAYLY9VKKDJCZtBIkO0DhoKw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=HSAJN0lHYlVq8OiW0kbSZ3GLKK0TFQQqFVpFoLDLcm/jACyA2w0iWzrWODweFSMM68YG0fLu/qPTUX3jDu4Hw3MAHEIhffmbBhwQITQ8te7QdoFIABc/TwzTYMJQ9MjDFXoUsms+l2e5mpRGA4jt41946+9bd4TiYHxkoQ0mLB6kQvEBA4H88qkXpLXbyr6xV3bkO/3zOXCJ5lNtGdR+VZldKn0SSLgK/k14Fd5VBvZDrZXc/Qm7kosUqtx41ajDpGGBiHLKl79wQ8Qh2szg7GvqqH4u6UwXmkf7ZzQKqYfLI4sesiFG8NgtaBd9kF6UaJX6lFAK9HdBScz/MyTqiA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com;
  • Cc: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Thu, 13 Feb 2025 15:38:11 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHbfi1Am1l4vN4jQUCNGyHDqcpHNw==
  • Thread-topic: [PATCH v2 2/2] arch: arm64: always set IL=1 when injecting an abort exception

ARM Architecture Reference Manual states that IL field of ESR_EL1
register should be 1 in some cases, and all these cases are covered by
inject_abt64_exception()

Section D24.2.40, page D24-7337 of ARM DDI 0487L:

  IL, bit [25]
  Instruction Length for synchronous exceptions. Possible values of this bit 
are:

  [...]

  0b1 - 32-bit instruction trapped.
  This value is also used when the exception is one of the following:
  [...]
   - An Instruction Abort exception.
   - A Data Abort exception for which the value of the ISV bit is 0.
  [...]

inject_abt64_exception() function injects either Instruction Abort or
Data Abort exception. In both cases, ISS is 0, which means that ISV
bit is 0 as well. Thus, IL must be set to 1 unconditionally.

To align code with the specification, set .len field to 1 in
inject_abt64_exception() and remove unneeded third parameter.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@xxxxxxxx>

Changes in v2:
 - Introduced in v2
---
 xen/arch/arm/traps.c | 29 ++++++++++++-----------------
 1 file changed, 12 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 5338d5c033..3071c38768 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -559,13 +559,12 @@ void inject_undef64_exception(struct cpu_user_regs *regs)
 /* Inject an abort exception into a 64 bit guest */
 static void inject_abt64_exception(struct cpu_user_regs *regs,
                                    int prefetch,
-                                   register_t addr,
-                                   int instr_len)
+                                   register_t addr)
 {
     vaddr_t handler;
     union hsr esr = {
         .iss = 0,
-        .len = instr_len,
+        .len = 1,
     };
 
     if ( regs_mode_is_user(regs) )
@@ -591,17 +590,15 @@ static void inject_abt64_exception(struct cpu_user_regs 
*regs,
 }
 
 static void inject_dabt64_exception(struct cpu_user_regs *regs,
-                                   register_t addr,
-                                   int instr_len)
+                                    register_t addr)
 {
-    inject_abt64_exception(regs, 0, addr, instr_len);
+    inject_abt64_exception(regs, 0, addr);
 }
 
 static void inject_iabt64_exception(struct cpu_user_regs *regs,
-                                   register_t addr,
-                                   int instr_len)
+                                    register_t addr)
 {
-    inject_abt64_exception(regs, 1, addr, instr_len);
+    inject_abt64_exception(regs, 1, addr);
 }
 
 #endif
@@ -617,26 +614,24 @@ void inject_undef_exception(struct cpu_user_regs *regs)
 }
 
 static void inject_iabt_exception(struct cpu_user_regs *regs,
-                                  register_t addr,
-                                  int instr_len)
+                                  register_t addr)
 {
         if ( is_32bit_domain(current->domain) )
             inject_pabt32_exception(regs, addr);
 #ifdef CONFIG_ARM_64
         else
-            inject_iabt64_exception(regs, addr, instr_len);
+            inject_iabt64_exception(regs, addr);
 #endif
 }
 
 static void inject_dabt_exception(struct cpu_user_regs *regs,
-                                  register_t addr,
-                                  int instr_len)
+                                  register_t addr)
 {
         if ( is_32bit_domain(current->domain) )
             inject_dabt32_exception(regs, addr);
 #ifdef CONFIG_ARM_64
         else
-            inject_dabt64_exception(regs, addr, instr_len);
+            inject_dabt64_exception(regs, addr);
 #endif
 }
 
@@ -1965,9 +1960,9 @@ inject_abt:
              "HSR=%#"PRIregister" pc=%#"PRIregister" gva=%#"PRIvaddr" 
gpa=%#"PRIpaddr"\n",
              hsr.bits, regs->pc, gva, gpa);
     if ( is_data )
-        inject_dabt_exception(regs, gva, hsr.len);
+        inject_dabt_exception(regs, gva);
     else
-        inject_iabt_exception(regs, gva, hsr.len);
+        inject_iabt_exception(regs, gva);
 }
 
 static inline bool needs_ssbd_flip(struct vcpu *v)
-- 
2.47.1



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.