[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3 1/3] CHANGELOG: Add missing entries for work during the 4.17 release
(Reducing the CC-list) Hi, On 22/11/2022 11:26, Henry Wang wrote: Signed-off-by: Henry Wang <Henry.Wang@xxxxxxx> --- v2 -> v3: - Move the uncertain release date to patch #3. v1 -> v2: - Correct wording for two x86 entries (clock frequency calibration and SPR & ADL support) following Jan's suggestion. - Add missing Arm entries from Oleksandr. - Add missing i.MX entry following Stefano's suggestion. --- CHANGELOG.md | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index adbbb216fa..c593081aaf 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -4,16 +4,44 @@ Notable changes to Xen will be documented in this file.The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) -## [unstable UNRELEASED](https://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD+## [4.17.0](https://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=staging)### Changed- On x86 "vga=current" can now be used together with GrUB2's gfxpayload setting. Note that this requires use of "multiboot2" (and "module2") as the GrUB commands loading Xen. + - The "gnttab" option now has a new command line sub-option for disabling the + GNTTABOP_transfer functionality. + - The x86 MCE command line option info is now updated.### Added / support upgraded+ - Out-of-tree builds for the hypervisor now supported. + - The project has officially adopted 4 directives and 24 rules of MISRA-C, + added MISRA-C checker build integration, and defined how to document + deviations. - IOMMU superpage support on x86, affecting PV guests as well as HVM/PVH ones when they don't share page tables with the CPU (HAP / EPT / NPT). - - Support VIRT_SSBD feature for HVM guests on AMD. + - Support VIRT_SSBD feature for HVM guests on AMD and MSR_SPEC_CTRL feature for + SVM guests. Did you really intend to write "SVM" rather than HVM? If yes, then to me "HVM guests on AMD" means the same as "SVM guests". So I would suggest the following wording: Support for VIRT_SSBD and MSR_SPEC_CTRL for HVM guests on AMD. + - Improved TSC, CPU, and APIC clock frequency calibration on x86. + - Add mwait-idle support for SPR and ADL on x86. + - Extend security support for hosts to 12 TiB of memory on x86. + - Add command line option to set cpuid parameters for dom0 at boot time on x86. + - Improved static configuration options on Arm. + - cpupools can be specified at boot using device tree on Arm. + - It is possible to use PV drivers with dom0less guests, allowing statically + booted dom0less guests with PV devices. + - On Arm, p2m structures are now allocated out of a pool of memory set aside at + domain creation. + - Improved mitigations against Spectre-BHB on Arm. + - Support VirtIO-MMIO devices in toolstack on Arm. I would clarify that this is *only* creating the device-tree binding. IOW, there are no support for ACPI nor device-emulator (still in progress from Xen Project PoV). + - Allow setting the number of CPUs to activate at runtime from command line + option on Arm. + - Grant-table support on Arm was improved and hardened by implementing + "simplified M2P-like approach for the xenheap pages" + - Add Renesas R-Car Gen4 IPMMU-VMSA support on Arm. + - Add i.MX lpuart and i.MX8QM initial support on Arm. I was under the impression that the code that was merged is enough to support the platform. Do you have any pointer where it says it is not sufficient? + - Improved toolstack build system. + - Add Xue - console over USB 3 Debug Capability.### Removed / support downgraded- dropped support for the (x86-only) "vesa-mtrr" and "vesa-remap" command line options Cheers, -- Julien Grall
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