Re: [PATCH v3 2/3] Changelog: Add __ro_after_init and CET

[Julien Grall <julien@xxxxxxx>]

Hi Henry,

On 22/11/2022 11:26, Henry Wang wrote:
> From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Your signed-off-by is missing.

> Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> ---
> v2 -> v3:
> - Remove the "on x86" for __ro_after_init, as Arm also supports the
>    __ro_after_init. > v1 -> v2:
> - Include this patch in the series
> ---
>   CHANGELOG.md | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index c593081aaf..5ef507a49c 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -15,6 +15,7 @@ The format is based on [Keep a 
> Changelog](https://keepachangelog.com/en/1.0.0/)
>   
>   ### Added / support upgraded
>    - Out-of-tree builds for the hypervisor now supported.
> + - __ro_after_init support, for marking data as immutable after boot.
>    - The project has officially adopted 4 directives and 24 rules of MISRA-C,
>      added MISRA-C checker build integration, and defined how to document
>      deviations.
> @@ -23,6 +24,9 @@ The format is based on [Keep a 
> Changelog](https://keepachangelog.com/en/1.0.0/)
>    - Support VIRT_SSBD feature for HVM guests on AMD and MSR_SPEC_CTRL feature 
> for
>      SVM guests.
>    - Improved TSC, CPU, and APIC clock frequency calibration on x86.
> + - Support for Xen using x86 Control Flow Enforcement technology for its own
> +   protection. Both Shadow Stacks (ROP protection) and Indirect Branch
> +   Tracking (COP/JOP protection).
>    - Add mwait-idle support for SPR and ADL on x86.
>    - Extend security support for hosts to 12 TiB of memory on x86.
>    - Add command line option to set cpuid parameters for dom0 at boot time on 
> x86.
--
Julien Grall