[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH V6 3/5] x86/hvm: pkeys, add xstate support for pkeys
The XSAVE feature set can operate on PKRU state only if the feature set is enabled (CR4.OSXSAVE = 1) and has been configured to manage PKRU state (XCR0[9] = 1). And XCR0.PKRU is disabled on PV mode without PKU feature enabled. Signed-off-by: Huaitong Han <huaitong.han@xxxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- xen/arch/x86/xstate.c | 4 ++++ xen/include/asm-x86/xstate.h | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 4e87ab3..b79b20b 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -579,6 +579,10 @@ int handle_xsetbv(u32 index, u64 new_bv) if ( (new_bv & ~xfeature_mask) || !valid_xcr0(new_bv) ) return -EINVAL; + /* XCR0.PKRU is disabled on PV mode. */ + if ( is_pv_vcpu(curr) && (new_bv & XSTATE_PKRU) ) + return -EINVAL; + if ( !set_xcr0(new_bv) ) return -EFAULT; diff --git a/xen/include/asm-x86/xstate.h b/xen/include/asm-x86/xstate.h index 12d939b..f7c41ba 100644 --- a/xen/include/asm-x86/xstate.h +++ b/xen/include/asm-x86/xstate.h @@ -34,13 +34,15 @@ #define XSTATE_OPMASK (1ULL << 5) #define XSTATE_ZMM (1ULL << 6) #define XSTATE_HI_ZMM (1ULL << 7) +#define XSTATE_PKRU (1ULL << 9) #define XSTATE_LWP (1ULL << 62) /* AMD lightweight profiling */ #define XSTATE_FP_SSE (XSTATE_FP | XSTATE_SSE) #define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | \ XSTATE_ZMM | XSTATE_HI_ZMM | XSTATE_NONLAZY) #define XSTATE_ALL (~(1ULL << 63)) -#define XSTATE_NONLAZY (XSTATE_LWP | XSTATE_BNDREGS | XSTATE_BNDCSR) +#define XSTATE_NONLAZY (XSTATE_LWP | XSTATE_BNDREGS | XSTATE_BNDCSR | \ + XSTATE_PKRU) #define XSTATE_LAZY (XSTATE_ALL & ~XSTATE_NONLAZY) #define XSTATE_COMPACTION_ENABLED (1ULL << 63) -- 2.4.3 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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