[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH V6 0/5] x86/hvm: pkeys, add memory protection-key support
Changes in v6: *2 patches merged are not included. *Don't write XSTATE_PKRU to PV's xcr0. *Use "if()" instead of "?:" in cpuid handling patch. *Update read_pkru function. *Use value 4 instead of CONFIG_PAGING_LEVELS. *Add George's patch for PFEC_insn_fetch handling. Changes in v5: *Add static for opt_pku. *Update commit message for some patches. *Add condition 5:the access is to a user page to pkey_fault, and simplify #ifdef for guest_walk_tables patch. *Don't write XSTATE_PKRU to PV's xcr0. *count == 0 is combined in hvm_cpuid function. Changes in v4: *Delete gva2gfn patch, and when page is present, PFEC_prot_key is always checked. *Use RDPKRU instead of xsave_read because RDPKRU does cost less. *Squash pkeys patch and pkru patch to guest_walk_tables patch. Changes in v3: *Get CPUID:ospke depend on guest cpuid instead of host hardware capable, and Move cpuid patch to the last of patches. *Move opt_pku to cpu/common.c. *Use MASK_EXTR for get_pte_pkeys. *Add quoting for pkru macro, and use static inline pkru_read functions. *Rebase get_xsave_addr for updated codes, and add uncompressed format support for xsave state. *Use fpu_xsave instead of vcpu_save_fpu, and adjust the code style for leaf_pte_pkeys_check. *Add parentheses for PFEC_prot_key of gva2gfn funcitons. Changes in v2: *Rebase all patches in staging branch *Disable X86_CR4_PKE on hypervisor, and delete pkru_read/write functions, and use xsave state read to get pkru value. *Delete the patch that adds pkeys support for do_page_fault. *Add pkeys support for gva2gfn so that setting _PAGE_PK_BIT in the return value can get propagated to the guest correctly. The protection-key feature provides an additional mechanism by which IA-32e paging controls access to usermode addresses. Hardware support for protection keys for user pages is enumerated with CPUID feature flag CPUID.7.0.ECX[3]:PKU. Software support is CPUID.7.0.ECX[4]:OSPKE with the setting of CR4.PKE(bit 22). When CR4.PKE = 1, every linear address is associated with the 4-bit protection key located in bits 62:59 of the paging-structure entry that mapped the page containing the linear address. The PKRU register determines, for each protection key, whether user-mode addresses with that protection key may be read or written. The PKRU register (protection key rights for user pages) is a 32-bit register with the following format: for each i (0 â i â 15), PKRU[2i] is the access-disable bit for protection key i (ADi); PKRU[2i+1] is the write-disable bit for protection key i (WDi). Software can use the RDPKRU and WRPKRU instructions with ECX = 0 to read and write PKRU. In addition, the PKRU register is XSAVE-managed state and can thus be read and written by instructions in the XSAVE feature set. PFEC.PK (bit 5) is defined as protection key violations. The specification of Protection Keys can be found at SDM (4.6.2, volume 3) http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf. Huaitong Han (5): x86/hvm: pkeys, disable pkeys for guests in non-paging mode x86/hvm: pkeys, add pkeys support for guest_walk_tables x86/hvm: pkeys, add xstate support for pkeys xen/mm: Clean up pfec handling in gva_to_gfn x86/hvm: pkeys, add pkeys support for cpuid handling tools/libxc/xc_cpufeature.h | 2 ++ tools/libxc/xc_cpuid_x86.c | 6 +++-- xen/arch/x86/hvm/hvm.c | 44 ++++++++++++++++++-------------- xen/arch/x86/hvm/vmx/vmx.c | 11 ++++---- xen/arch/x86/mm/guest_walk.c | 53 +++++++++++++++++++++++++++++++++++++++ xen/arch/x86/mm/hap/guest_walk.c | 13 +++++++++- xen/arch/x86/mm/shadow/multi.c | 6 +++++ xen/arch/x86/xstate.c | 4 +++ xen/include/asm-x86/guest_pt.h | 12 +++++++++ xen/include/asm-x86/hvm/hvm.h | 2 ++ xen/include/asm-x86/page.h | 5 ++++ xen/include/asm-x86/processor.h | 40 +++++++++++++++++++++++++++++ xen/include/asm-x86/x86_64/page.h | 12 +++++++++ xen/include/asm-x86/xstate.h | 4 ++- 14 files changed, 186 insertions(+), 28 deletions(-) -- 2.4.3 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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