I was looking at the code for the memory events for guest domain in "xen/arch/xen/mm/mem_event.c". In the function "mem_event_domctl()" for the case "XEN_DOMCTL_MEM_EVENT_OP_ACCESS", there is a comment that "Currently only EPT is supported"
and then a check is made for the vmx presence and control returns if it is not Intel VT with an error.
I am trying to make the memory events working on AMD SVM with NPT support.
My question is that is there a specific reason why AMD NPT is supported there?
The things I should keep in mind/work on to support the memory events on AMD NPT.
(Working on Xen 4.4 on HVM guests (windows XP 32 bit -PAE)
I am not aware of any technical reasons why AMD support could not be added.
I don't know why there is still a VMX check. c/s d928515d76 took out an EPT check and that appears to have been fine.
Try it and see - it could be as easy as just deleting the vmx check.
Deleting the vmx check might not be sufficient w.r.t mem_access. The AMD NPT structure differs from the Intel EPT structures. NPT layout is more like a regular
page-table. Whereas EPT has explicit R, W, X bits allowing for access permissions like execute only i.e. a page that the guest can only execute but not read. A guest read will cause a mem_event to be fired to the listener. I am not sure if this is possible
easily with AMD but definitely a sub-set of the permissions is definitely possible. This is what I did in my RFC series for enabling mem_access for PV domains.
It would certainly be nice to try and get some parity back in our feature sets; a number of new features arrive as Intel-only because they were developed on Intel systems, rather than a specific reason why the feature wouldn't work on AMD.
I second this and it would certainly be good to have feature parity across AMD and Intel processors.
Thanks,
Aravindh
