Re: [Xen-devel] [PATCH 5/5] xen: arm: flush TLB after overwriting 1:1 mapping in boot page tables

[Julien Grall <julien.grall@xxxxxxxxxx>]

Hi Ian,

On 14/07/14 17:39, Ian Campbell wrote:
> Otherwise a stale TLB entry can shadow the fixmap/UART or DTB mapping
>
> Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Good catch! I guess this could also happen on Xen 4.4. I would consider 
to backport it :)
Acked-by: Julien Grall <julien.grall@xxxxxxxxxx>

Regards,

--
Julien Grall

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