[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 5/5] xen: arm: flush TLB after overwriting 1:1 mapping in boot page tables
On Wed, 2014-07-16 at 19:11 +0100, Julien Grall wrote: > Hi Ian, > > On 14/07/14 17:39, Ian Campbell wrote: > > Otherwise a stale TLB entry can shadow the fixmap/UART or DTB mapping > > > > Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> > > Good catch! I guess this could also happen on Xen 4.4. I would consider > to backport it :) I noticed when moving the PRINT(- Ready -) to right after x32 (for debug purposes) was reloaded with the UART address failed. I've added this to my backports list. > Acked-by: Julien Grall <julien.grall@xxxxxxxxxx> Cheers. Ian. _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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