Re: [Xen-devel] MPIDR register usage in ARMv8

[Vijay Kilari <vijay.kilari@xxxxxxxxx>]

On Wed, Apr 16, 2014 at 2:36 PM, Julien Grall <julien.grall@xxxxxxxxxx> wrote:
>
>
> On 16/04/14 06:53, Vijay Kilari wrote:
>>
>> Hi Ian,
>
>
> Hi Vijaya,
>
>>
>> I understand that arm64/head.S is using MPIDR definitions
>> from xen/include/asm-arm/processor.h which is valid for arm32 but
>> not for ARMv8 as below
>>
>> /* MPIDR Multiprocessor Affinity Register */
>> #define _MPIDR_UP           (30)
>> #define MPIDR_UP            (_AC(1,U) << _MPIDR_UP)
>> #define _MPIDR_SMP          (31)
>> #define MPIDR_SMP           (_AC(1,U) << _MPIDR_SMP)
>> #define MPIDR_AFF0_SHIFT    (0)
>> #define MPIDR_AFF0_MASK     (_AC(0xff,U) << MPIDR_AFF0_SHIFT)
>> #define MPIDR_HWID_MASK     _AC(0xffffff,U)
>> #define MPIDR_INVALID       (~MPIDR_HWID_MASK)
>>
>> The same is used in arm64/head.S checking for bit 31 (_MPIDR_SMP) which is
>> not
>> valid in MPIDR_EL1 register definition also MPIDR_HWID_MASK should
>> be updated for ARMv8
>
>
> Bit 31 is RAO on ARM64. So the check is useless below.
>
> Except the MPIDR_HWID_MASK I don't see any problem as the only difference
> between ARMv8 and ARMv7 is adding a new affinity field (AFF3).

Thanks. Yes, I will send a patch. I will move these MPIDR definitions
from include/asm-arm/processor.h
to include/asm-arm/arm32/processor.h & include/asm-arm/arm64/processor.h
>
>
>>
>> arm64/head.s:
>>
>>          mrs   x0, mpidr_el1
>>          tbz   x0, _MPIDR_SMP, 1f     /* Multiprocessor extension not
>> supported? */
>>          tbnz  x0, _MPIDR_UP, 1f      /* Uniprocessor system? */
>>
>>          mov   x13, #(~MPIDR_HWID_MASK)
>>          bic   x24, x0, x13           /* Mask out flags to get CPU ID */
>> 1:
>>
>> Do you agree that this requires change?
>
>
> What are the changes? You only copied the existing code?
It is just copy of existing code.
>
> Regards,
>
> --
> Julien Grall

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