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[Xen-devel] [PATCH v2] x86/HAP: also flush TLB when altering a present 1G entry or intermediate levels



Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
v2: Flush on all changes of previously present entries.

--- a/xen/arch/x86/mm/hap/hap.c
+++ b/xen/arch/x86/mm/hap/hap.c
@@ -711,9 +711,8 @@ hap_write_p2m_entry(struct vcpu *v, unsi
     }
 
     safe_write_pte(p, new);
-    if ( (old_flags & _PAGE_PRESENT)
-         && (level == 1 || (level == 2 && (old_flags & _PAGE_PSE))) )
-             flush_tlb_mask(d->domain_dirty_cpumask);
+    if ( old_flags & _PAGE_PRESENT )
+        flush_tlb_mask(d->domain_dirty_cpumask);
 
     paging_unlock(d);
 



Attachment: x86-HAP-always-flush-present.patch
Description: Text document

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