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Re: [Xen-devel] [PATCH v2] x86/HAP: also flush TLB when altering a present 1G entry or intermediate levels



At 12:37 +0100 on 14 Apr (1397475434), Jan Beulich wrote:
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Acked-by: Tim Deegan <tim@xxxxxxx>


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