[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH V4.1] mcheck, vmce: Allow vmce_amd_* functions to handle AMD thresolding MSRs
>>> On 13.02.14 at 19:24, Aravind Gopalakrishnan >>> <aravind.gopalakrishnan@xxxxxxx> wrote: > On 2/13/2014 11:27 AM, Aravind Gopalakrishnan wrote: >> On 2/13/2014 2:38 AM, Jan Beulich wrote: >>>> *val = 0; >>>> - switch ( msr & (MSR_IA32_MC0_CTL | 3) ) >>>> + /* Allow only first 3 MC banks into switch() */ >>>> + switch ( msr & (-MSR_IA32_MC0_CTL | 3) ) >>>> { >>>> case MSR_IA32_MC0_CTL: >>>> /* stick all 1's to MCi_CTL */ >>> I'm confused: You now add a comment as if the mask was including >>> bit 4, which it doesn't. What am I missing? >> >> Darn. Sorry about that. Will fix.. > > Jan, > > Do let me know if the following wording is fine: > > /* > * Apply mask to allow bits[0:1] (necessary to uniquely identify MC0) > * MC1 is handled by virtue of 'bank' value. > */ > > If not, I'm open to suggestions:) I don't particularly like this, but I also don't have a good alternative suggestion. It was Christoph who asked for a comment in the first place. Since I don't see a particular need for a comment here, you two should work out what best suits both of you. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |