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Re: [Xen-devel] [PATCH V4.1] mcheck, vmce: Allow vmce_amd_* functions to handle AMD thresolding MSRs

On 2/13/2014 11:27 AM, Aravind Gopalakrishnan wrote:
On 2/13/2014 2:38 AM, Jan Beulich wrote:
    *val = 0;
  -    switch ( msr & (MSR_IA32_MC0_CTL | 3) )
+    /* Allow only first 3 MC banks into switch() */
+    switch ( msr & (-MSR_IA32_MC0_CTL | 3) )
      case MSR_IA32_MC0_CTL:
          /* stick all 1's to MCi_CTL */
I'm confused: You now add a comment as if the mask was including
bit 4, which it doesn't. What am I missing?

Darn. Sorry about that. Will fix..


Do let me know if the following wording is fine:

 * Apply mask to allow bits[0:1] (necessary to uniquely identify MC0)
 * MC1 is handled by virtue of 'bank' value.

If not, I'm open to suggestions:)


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