[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] pl011: preserve RTS and DTR signal on UART init
On Tue, 2013-09-03 at 16:34 +0100, Ian Campbell wrote: > On Tue, 2013-09-03 at 16:00 +0200, Andre Przywara wrote: > > Although we do not support hardware flow control in the Xen driver > > for the PL011 UART, the other end may be configured to use it. > > In this case it waits in vain for the RTS signal to be asserted by > > the host and will never transmit any characters. > > So we leave RTS and DTR as they had been setup before. > > This fixes the UART input on Calxeda Midway, which uses hardware > > flow control for the serial-over-LAN functionality. > > > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx> > > Acked + applied, thanks. Sent this a bit prematurely, having some issues with a recently upgraded build box. Should be pushed soon though. > > I wonder if we should turn of RXE/TXE/UARTEN early on before we do our > own setup? Just to get things in a known quiet state. Although if this > was going to be a problem it would have bit us all the way through > boot... > > > --- > > xen/drivers/char/pl011.c | 7 +++++-- > > xen/include/asm-arm/pl011-uart.h | 4 ++++ > > 2 files changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c > > index 3ec6e10..3386e2b 100644 > > --- a/xen/drivers/char/pl011.c > > +++ b/xen/drivers/char/pl011.c > > @@ -85,6 +85,7 @@ static void __init pl011_init_preirq(struct serial_port > > *port) > > { > > struct pl011 *uart = port->uart; > > unsigned int divisor; > > + unsigned int cr; > > > > /* No interrupts, please. */ > > pl011_write(uart, IMSC, 0); > > @@ -120,8 +121,10 @@ static void __init pl011_init_preirq(struct > > serial_port *port) > > pl011_write(uart, IMSC, 0); > > pl011_write(uart, ICR, ALLI); > > > > - /* Enable the UART for RX and TX; no flow ctrl */ > > - pl011_write(uart, CR, RXE | TXE | UARTEN); > > + /* Enable the UART for RX and TX; keep RTS and DTR */ > > + cr = pl011_read(uart, CR); > > + cr &= RTS | DTR; > > + pl011_write(uart, CR, cr | RXE | TXE | UARTEN); > > } > > > > static void __init pl011_init_postirq(struct serial_port *port) > > diff --git a/xen/include/asm-arm/pl011-uart.h > > b/xen/include/asm-arm/pl011-uart.h > > index 3332c51..123f477 100644 > > --- a/xen/include/asm-arm/pl011-uart.h > > +++ b/xen/include/asm-arm/pl011-uart.h > > @@ -38,6 +38,10 @@ > > #define DMACR (0x48) > > > > /* CR bits */ > > +#define CTSEN (1<<15) /* automatic CTS hardware flow control */ > > +#define RTSEN (1<<14) /* automatic RTS hardware flow control */ > > +#define RTS (1<<11) /* RTS signal */ > > +#define DTR (1<<10) /* DTR signal */ > > #define RXE (1<<9) /* Receive enable */ > > #define TXE (1<<8) /* Transmit enable */ > > #define UARTEN (1<<0) /* UART enable */ > > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@xxxxxxxxxxxxx > http://lists.xen.org/xen-devel _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |