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Re: [Xen-devel] [PATCH] tools/xen-mceinj: support AMD

On 28.03.13 14:58, Jan Beulich wrote:
On 28.03.13 at 14:23, Christoph Egger <chegger@xxxxxxxxx> wrote:
On 28.03.13 12:44, Jan Beulich wrote:
On 27.03.13 at 14:41, Egger Christoph <chegger@xxxxxxxxx> wrote:

Didn't you also require a hypervisor side change for

You didn't answer this one.

Yes, this is right for AMD but not for Intel.
I will submit it once I got the permission.


+#define MC4_type_MISC1      0x4
+#define MC4_type_MISC2      0x5
+#define MC4_type_MISC3      0x6

which also gets me back to the previously asked question why
this is done only for bank 4.

These MSRs only exist on bank 4.

Sure, but it still looks pretty arbitrary. Anyway, the comment
wasn't meant to be a NAK of any kind.


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