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RE: [PATCH] arm/entry: set x0 before cache maintenance.
- To: Jianyong Wu <Jianyong.Wu@xxxxxxx>, "minios-devel@xxxxxxxxxxxxxxxxxxxx" <minios-devel@xxxxxxxxxxxxxxxxxxxx>, "sharan.santhanam@xxxxxxxxx" <sharan.santhanam@xxxxxxxxx>, "simon.kuenzer@xxxxxxxxx" <simon.kuenzer@xxxxxxxxx>
- From: Jianyong Wu <Jianyong.Wu@xxxxxxx>
- Date: Wed, 6 Jan 2021 03:11:32 +0000
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- Cc: Justin He <Justin.He@xxxxxxx>
- Delivery-date: Wed, 06 Jan 2021 03:11:44 +0000
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- Thread-topic: [PATCH] arm/entry: set x0 before cache maintenance.
Sorry to have make mistake in this email. please neglect it.
> -----Original Message-----
> From: Jianyong Wu <jianyong.wu@xxxxxxx>
> Sent: Wednesday, January 6, 2021 9:55 AM
> To: minios-devel@xxxxxxxxxxxxxxxxxxxx; sharan.santhanam@xxxxxxxxx;
> simon.kuenzer@xxxxxxxxx
> Cc: Justin He <Justin.He@xxxxxxx>; Jianyong Wu <Jianyong.Wu@xxxxxxx>
> Subject: [PATCH] arm/entry: set x0 before cache maintenance.
>
> There is a long standing issue in entry code of arm that x0 is not set before
> using it in clean_and_invalidate_dcache_range. This error can be caught by
> kvm and result in core dump.
> Here, x0 is set to the base address of dtb before cache maintain.
>
> Jira: ENTOS-2050
> Signed-off-by: Jianyong Wu <jianyong.wu@xxxxxxx>
> Change-Id: Ia81f5c65c19a33b7a640efcd4d3117f61c59dd28
> ---
> plat/kvm/arm/entry64.S | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/plat/kvm/arm/entry64.S b/plat/kvm/arm/entry64.S index
> c4de334..0526ae8 100644
> --- a/plat/kvm/arm/entry64.S
> +++ b/plat/kvm/arm/entry64.S
> @@ -92,6 +92,12 @@ ENTRY(_libkvmplat_entry)
> add x27, x26, x17
> add x27, x27, #__STACK_SIZE
> sub x1, x27, x25
> +
> +/*
> + * set x0 to the location stores dtb as the base address of the
> + * memory range to be cache maintained
> + */
> +ldr x0, =_dtb
> bl clean_and_invalidate_dcache_range
>
> /* Disable the MMU and D-Cache. */
> --
> 2.17.1
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