[PATCH] arm/entry: set x0 before cache maintain.

[Jianyong Wu <jianyong.wu@xxxxxxx>]

There is a long standing issue in entry code of arm that x0 is not
set before using it in clean_and_invalidate_dcache_range. This error
can be caught by kvm and result in core dump.
Here, x0 is set to the location where stores dtb before cache maintain.

Signed-off-by: Jianyong Wu <jianyong.wu@xxxxxxx>
---
 plat/kvm/arm/entry64.S | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/plat/kvm/arm/entry64.S b/plat/kvm/arm/entry64.S
index c4de334..aeb70c8 100644
--- a/plat/kvm/arm/entry64.S
+++ b/plat/kvm/arm/entry64.S
@@ -92,6 +92,10 @@ ENTRY(_libkvmplat_entry)
        add x27, x26, x17
        add x27, x27, #__STACK_SIZE
        sub x1, x27, x25
+
+       /* Load dtb address to x0 as a parameter */
+       ldr x0, =_dtb
+
        bl clean_and_invalidate_dcache_range
 
        /* Disable the MMU and D-Cache. */
@@ -135,8 +139,6 @@ ENTRY(_libkvmplat_entry)
        /* Enable the mmu */
        bl start_mmu
 
-       /* Load dtb address to x0 as a parameter */
-       ldr x0, =_dtb
        b _libkvmplat_start
 END(_libkvmplat_entry)
 
-- 
2.17.1