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Re: [Xen-ia64-devel] [PATCH] add support for hvm live migration

To: Kouya Shimura <kouya@xxxxxxxxxxxxxx>
From: Tristan Gingold <tgingold@xxxxxxx>
Date: Thu, 14 Feb 2008 06:22:32 +0100
Cc: xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
Delivery-date: Wed, 13 Feb 2008 21:15:22 -0800
List-id: Discussion of the ia64 port of Xen <xen-ia64-devel.lists.xensource.com>

On Thu, Feb 14, 2008 at 01:21:34PM +0900, Kouya Shimura wrote:
> The fault address must be on a TLB when a dirty bit fault is generated.
> So I believe that a tlb miss of tpa never happen at this point
> as long as IVT is mapped by a TR.

I don't think it is warrantied by the ASDM, although failure cases must be
extremely rare.

Tristan.

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  - From: Kouya Shimura
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  - From: Tristan Gingold
- Re: [Xen-ia64-devel] [PATCH] add support for hvm live migration
  - From: Kouya Shimura

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