[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 11/23] xen/arm: vsmmuv3: Attach Stage-1 configuration to SMMUv3 hardware
- To: Milan Djokic <milan_djokic@xxxxxxxx>
- From: Luca Fancellu <Luca.Fancellu@xxxxxxx>
- Date: Mon, 13 Apr 2026 11:20:36 +0000
- Accept-language: en-GB, en-US
- Arc-authentication-results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 4.158.2.129) smtp.rcpttodomain=epam.com smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=arm.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dkim=[1,1,header.d=arm.com] dmarc=[1,1,header.from=arm.com])
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none
- Arc-message-signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aExhZ8RsEchHwcCN4tdC2mc8T2FKPcQ1CUXHmeGfEZ4=; b=ljAdb8iP4uCXWWIYQMpVpKBvceFAXaMNh1AWe0MM0N4BaHu03m419DRZHkQUb5pD9STUClXdspyzG0OKJ6uCdr8fh8aLmL654b6x2C9pkxJlr0KpyuytOeWstt6whUOnfnMyv4RNgVtLGxp4smEDPxmu2Xhbk4JtfxI8FxnsL2hRW66m+GFMaCsFRNG0/0DmN9GcJ42mC3D2DN5ONLOaof1/AfM0X3yhNEG6mb+O+KDCHFonU9t9TfvS/hzQSiZJ1qnC52b/WTXqXT34UL8ldvlSTwyP749AxZI1n17oUq8FwD493MsQFT3VG32qhoPkhe2CES+jH6KbTxgWO13tcg==
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aExhZ8RsEchHwcCN4tdC2mc8T2FKPcQ1CUXHmeGfEZ4=; b=pA3b1KCvndII1mbJ9mkwpXpUmBRaZL7qEWfd9Ks54pRJ8mOS+hvXlSn/+ys8GXK2c0PkHLsSk32LY4CtwyI+SGZzFIkTDnwbpTKzAHbY396x6iMgV6lHXL1A2fkw/Ri1IYJD8op6l5SA70EJicVj3mqQ2C7zq2qMfifREYYXzaUS7/wkCq29TFrBpjBTaEVkjuaQ85Nv2YAevpKpj3M9j8fsJtk4GA3XXdPv0SGG5Rx2JTTMrcN7Ka8dBIbeZNPCMK7JncTmCqP9agrKFHmSxcPnVlvPd3MWzj0/ss+6mJzGQ0uIpkw2F60Q0qVjXdwPaNJXcy5GmtBJCKQI+aGa/A==
- Arc-seal: i=2; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=pass; b=hP6AjWR4xgXEeQ/DH1Kj/llpFK/rydiRBOvuoBc1qjuq7Dsi5J2Hy8U2o/FqLQOUJIfnHNzzXkuuXoSNkh0jVWjZTYw0fPzvnx+MczSO31gI7TqXSY9BkdkbwQKDhOJiCRwZv+ZiBsXc4DKw0msCyR0C/4WUG528uPcgWfA7ABhTXfP+lM1OD2tenQxE+wFLcm2259Z6KXincJCT4HHpAQMVKPDA0QEGwAiDw906QsuGBuFWODyMU3/PsLwjJFqJAyyMrUVRCngvBrlgxW0b83Tj1idabDGyeEqukwMQvdwRDVfPFTRKqW7uPV4/nY5PezGwAxmH+313rwguunsG3g==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=DypZybjwUtMiir69GrqXy/+Xjp441LsV9X6xa0dTD9drilw+3GUVbrM0ru2kKOcy3cjG6rwIh43B9/qkcjTQhaZDNBMV9WLhnwabNc1up4EzPRD+SGoF/PQyjyod7k6BQHSl4gmQrv83idEumFQEWwh2tiw413Q1e+e1HqprkIoKHBb2tsFNKuc0Y8Y/RXcCnxfR3f4GHWYlYXUZ7c0zslWbG2+2CrgXtKPFdlIQxMMkzMm2hPClhJhm5oE8pF3LomxxbJc0IdImwg/o3bLubJKqkNUTTyWmoSsQPSeByFXOtHFGgqDOJjxucimlX9nf7j9zR/uEOfdXQRu63P/EqQ==
- Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=arm.com header.i="@arm.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"; dkim=pass header.s=selector1 header.d=arm.com header.i="@arm.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
- Authentication-results-original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com;
- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Rahul Singh <Rahul.Singh@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Delivery-date: Mon, 13 Apr 2026 11:21:45 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Nodisclaimer: true
- Thread-index: AQHcyy/u1+T36BIjnkSypQJ5KiHeE7Xc2JCA
- Thread-topic: [PATCH v3 11/23] xen/arm: vsmmuv3: Attach Stage-1 configuration to SMMUv3 hardware
HI Milan,
> On 13 Apr 2026, at 11:26, Luca Fancellu <Luca.Fancellu@xxxxxxx> wrote:
>
> Hi Milan,
>
>
>> On 31 Mar 2026, at 02:52, Milan Djokic <milan_djokic@xxxxxxxx> wrote:
>>
>> From: Rahul Singh <rahul.singh@xxxxxxx>
>>
>> Attach the Stage-1 configuration to device STE to support nested
>> translation for the guests.
>>
>> Signed-off-by: Rahul Singh <rahul.singh@xxxxxxx>
>> Signed-off-by: Milan Djokic <milan_djokic@xxxxxxxx>
>> ---
>> xen/arch/arm/include/asm/iommu.h | 7 +++
>> xen/drivers/passthrough/arm/smmu-v3.c | 79 ++++++++++++++++++++++++++
>> xen/drivers/passthrough/arm/smmu-v3.h | 1 +
>> xen/drivers/passthrough/arm/vsmmu-v3.c | 18 ++++++
>> xen/include/xen/iommu.h | 6 ++
>> 5 files changed, 111 insertions(+)
>>
>> diff --git a/xen/arch/arm/include/asm/iommu.h
>> b/xen/arch/arm/include/asm/iommu.h
>> index ad15477e24..56bc9314a7 100644
>> --- a/xen/arch/arm/include/asm/iommu.h
>> +++ b/xen/arch/arm/include/asm/iommu.h
>> @@ -20,6 +20,13 @@ struct arch_iommu
>> void *priv;
>> };
>>
>> +struct iommu_guest_config {
>> + paddr_t s1ctxptr;
>> + uint8_t config;
>> + uint8_t s1fmt;
>> + uint8_t s1cdmax;
>> +};
>> +
>> const struct iommu_ops *iommu_get_ops(void);
>> void iommu_set_ops(const struct iommu_ops *ops);
>>
>> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c
>> b/xen/drivers/passthrough/arm/smmu-v3.c
>> index 87612df21d..cf8f638a49 100644
>> --- a/xen/drivers/passthrough/arm/smmu-v3.c
>> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
>> @@ -2810,6 +2810,37 @@ static struct arm_smmu_device
>> *arm_smmu_get_by_dev(const struct device *dev)
>> return NULL;
>> }
>>
>> +static struct iommu_domain *arm_smmu_get_domain_by_sid(struct domain *d,
>> + u32 sid)
>
> I think this might be wrong, a system can have multiple SMMU and the SID is
> unique only
> on each SMMU, not on the overall platform, I think
> arm_smmu_attach_guest_config should
> pass also the smmu for the selected sid.
Apologies, I’ve read the design, I think this is intentional. I withdraw this
comment.
Cheers,
Luca
|