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Re: [PATCH v1 2/3] xen/riscv: add support for local guest TLB flush using HFENCE.VVMA
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
- Date: Mon, 9 Feb 2026 11:21:54 +0100
- Cc: Romain Caritey <Romain.Caritey@xxxxxxxxxxxxx>, Alistair Francis <alistair.francis@xxxxxxx>, Connor Davis <connojdavis@xxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Mon, 09 Feb 2026 10:22:04 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 2/5/26 9:56 AM, Oleksii Kurochko wrote:
On 2/4/26 12:09 PM, Jan Beulich wrote:
On 02.02.2026 13:57, Oleksii Kurochko wrote:
@@ -14,6 +15,12 @@ static inline void local_hfence_gvma_all(void)
asm volatile ( "hfence.gvma zero, zero" ::: "memory" );
}
+/* Flush VS-stage TLB for current hart. */
+static inline void flush_tlb_guest_local(void)
+{
+ HFENCE_VVMA(0, 0);
For this use, ...
--- /dev/null
+++ b/xen/arch/riscv/include/asm/insn-defs.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef ASM_RISCV_INSN_DEFS_H
+#define ASM_RISCV_INSN_DEFS_H
+
+#define HFENCE_VVMA(vaddr, asid) \
+ asm volatile ("hfence.vvma %0, %1" \
+ :: "r"(vaddr), "r"(asid) : "memory")
... don't you want to use "rJ" as the constraints here?
Even without "rJ" it is using x0 when argument 0 is passed. Just to be
on a
safe side I don't mind to add "J".
When "J" is used compiler is trying to use integer 0 (what I misread when read
about J) but hfence.vvma expects two registers (zero register in this case), so
"J" can't be really used here.
~ Oleksii
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