[PATCH v1 0/3] RISC-V: p2m context switch

[Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>]

Introduce functions required to perform a p2m context switch during a vCPU
context switch.

This patch series originally depended on a single patch (Patch 1) from [1].
To avoid introducing a dependency on the larger patch series [1],
that patch was cherry-picked into the current series, since it is the
only true dependency.

Patch 2 is fully independent.

Patch 3 depends on Patch 1.

[1] 
https://lore.kernel.org/xen-devel/cover.1769099883.git.oleksii.kurochko@xxxxxxxxx/T/#t

Oleksii Kurochko (3):
  xen/riscv: introduce struct arch_vcpu
  xen/riscv: add support for local guest TLB flush using HFENCE.VVMA
  xen/riscv: implement p2m_ctx_switch_{to,from}_state()

 xen/arch/riscv/include/asm/domain.h    | 49 ++++++++++++++++
 xen/arch/riscv/include/asm/flushtlb.h  |  7 +++
 xen/arch/riscv/include/asm/insn-defs.h | 10 ++++
 xen/arch/riscv/include/asm/p2m.h       |  4 ++
 xen/arch/riscv/p2m.c                   | 81 ++++++++++++++++++++++++++
 5 files changed, 151 insertions(+)
 create mode 100644 xen/arch/riscv/include/asm/insn-defs.h

-- 
2.52.0