[PATCH 1/5] x86/pv: Address MISRA C:2012 Rule 4.1

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

MISRA doesn't like mixing hexadecimal escape sequences with ASCII text.  Use
the same workaround as in commit cd5048353725 ("xen: address MISRA C:2012 Rule
4.1").

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Stefano Stabellini <sstabellini@xxxxxxxxxx>
CC: consulting@xxxxxxxxxxx <consulting@xxxxxxxxxxx>
CC: Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>
---
 xen/arch/x86/pv/emul-inv-op.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/pv/emul-inv-op.c b/xen/arch/x86/pv/emul-inv-op.c
index 314ebd01cb34..346ac1124d7b 100644
--- a/xen/arch/x86/pv/emul-inv-op.c
+++ b/xen/arch/x86/pv/emul-inv-op.c
@@ -26,7 +26,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs 
*regs)
         pv_inject_page_fault(0, eip + sizeof(sig) - rc);
         return EXCRET_fault_fixed;
     }
-    if ( memcmp(sig, "\xf\xbxen", sizeof(sig)) )
+    if ( memcmp(sig, "\xf\xb" "xen", sizeof(sig)) )
         return 0;
     eip += sizeof(sig);
 
-- 
2.39.5