[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [PATCH v5 08/18] xen/cpu: Expand core frequency calculation for AMD Family 1Ah CPUs


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: "Penny, Zheng" <penny.zheng@xxxxxxx>
  • Date: Tue, 17 Jun 2025 08:37:35 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Nf0QYkR/TafdU4WgMuO/fHhhOQMqY8vnUfXysXD//aA=; b=E0RClnAhr3Kr/Ag7s0/TZdHwNyPuDeN42shopX7W+XkE5Yz3T5MEmkAPjZ/5p4KMT6A6ZNBwgJD0b9gZ5OUqzjHESu80RBDCg7d7X9bA94gGsDhnPFRWaDIkg6f10ZnrgnTTedx78VxtFirvAILj9QRsJa1Ka511mwqUH1WUT/E+KZNMsM3n3p3FCyn8lWdNZVKpna/4/ZCq/jC2MAAqAWOgIP2t4mEme5RPwOsdwJLp1p7IG5TRWsUJOdlb5HJ9Wj48XI/3hJOGnE7BH/bymcdM/s+qmDUgrVNgdBU0/NlGKvBMaIHXxMYw/yN3/QRQHj50/jG5JdsgrEPypjP1Ow==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=SarLjttMj6JAjjK0puUDWaLUVfnojJGf84P34T4ivxEi9FCpYpymT27rdz2D0mLEhAvXNqbkvkuqNXoGM2I5tQQ4SbgXs3iY0jApcg/xFoeIPqEoWd28fIPBhJBi+ewJqDj20zhrStouBgT5mcMVsKj34A5AnuHEjixwEnDmZR1JLC1YyfOYaKwHyiX9mjiQ/IUA/4yIQJHRBsxzJ7LzzuMTbS30IicPLITWBzmB33Euu2Zq47VRHveLSO/NjrBT7fZDipUiAqGqubl5J82aUoS/kFU0bPZRb7EAk4UUM4yt+TBqaO+oNW8pMGzWFw+/1XS7lgJC7kcVB81YJdpDgA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com;
  • Cc: "Huang, Ray" <Ray.Huang@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Tue, 17 Jun 2025 08:37:44 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Msip_labels: MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Enabled=True;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SetDate=2025-06-17T08:37:25.0000000Z;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Name=Open Source;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_ContentBits=3;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Method=Privileged
  • Thread-index: AQHbzuRB4/qHZZI650u0dV+1tuD8lbP/mD+AgAeP7oA=
  • Thread-topic: [PATCH v5 08/18] xen/cpu: Expand core frequency calculation for AMD Family 1Ah CPUs

[Public]

> -----Original Message-----
> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: Thursday, June 12, 2025 9:08 PM
> To: Penny, Zheng <penny.zheng@xxxxxxx>
> Cc: Huang, Ray <Ray.Huang@xxxxxxx>; Andrew Cooper
> <andrew.cooper3@xxxxxxxxxx>; Roger Pau Monné <roger.pau@xxxxxxxxxx>; xen-
> devel@xxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v5 08/18] xen/cpu: Expand core frequency calculation for
> AMD Family 1Ah CPUs
>
> On 27.05.2025 10:48, Penny Zheng wrote:
> > --- a/xen/arch/x86/cpu/amd.c
> > +++ b/xen/arch/x86/cpu/amd.c
> > @@ -583,12 +583,40 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
> >                                                            :
> > c->cpu_core_id);  }
> >
> > +static unsigned int attr_const amd_parse_freq(unsigned int family,
> > +                                         unsigned int value)
> > +{
> > +   unsigned int freq = 0;
> > +
> > +   switch (family) {
> > +   case 0x10 ... 0x16:
> > +           freq = (((value & 0x3f) + 0x10) * 100) >> ((value >> 6) & 7);
> > +           break;
> > +
> > +   case 0x17 ... 0x19:
> > +           freq = ((value & 0xff) * 25 * 8) / ((value >> 8) & 0x3f);
> > +           break;
> > +
> > +   case 0x1A:
> > +           freq = (value & 0xfff) * 5;
> > +           break;
> > +
> > +   default:
> > +           printk(XENLOG_ERR
> > +                  "Unsupported cpu family 0x%x on cpufreq parsing",
> > +                  family);
>
> I think I requested before (elsewhere) to prefer %#x over 0x%x.
>
> However, why the log message? With ...
>
> > +           break;
> > +   }
> > +
> > +   return freq;
> > +}
> > +
> >  void amd_log_freq(const struct cpuinfo_x86 *c)  {
> >     unsigned int idx = 0, h;
> >     uint64_t hi, lo, val;
> >
> > -   if (c->x86 < 0x10 || c->x86 > 0x19 ||
> > +   if (c->x86 < 0x10 || c->x86 > 0x1A ||
>
> ... this condition, there simply could be ASSERT_UNREACHABLE() there? Happy
> to adjust while committing, so long as you agree. With the adjustment:
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
>

Agreed, thx

> Jan

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.