Re: UBSan bug in real mode fpu emulation

[Fabian Specht <f.specht@xxxxxx>]

On Thu, Apr 24, 2025 at 08:34:42AM +0200, Jan Beulich wrote:
> Since ...
> 
> > Similar code resides in the same file in lines 87, 125 and 127.
> 
> ... all of these are shifts by 16, could you clarify what it is that you
> want to shift by 4? Imo what we need to do here is add casts to unsigned
> int, for the results thereof to be shifted (or use some extra arithmetic
> to achieve the same effect, e.g. add in 0U). Or we could go and replace
> the shifts by 16 with shifts by 12 (accounting for the later right shift
> by 4, which would then need dropping).

Oh I guess I was up too late, of course we need some sort of cast.

~Fabian