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Re: [PATCH v3 0/2] x86: Add Support for Paging-Write Feature




On 1/9/25 4:25 PM, Tamas K Lengyel wrote:
On Thu, Jan 9, 2025 at 9:30 AM Oleksii Kurochko
<oleksii.kurochko@xxxxxxxxx> wrote:

On 1/2/25 6:13 PM, Petr Beneš wrote:

From: Petr Beneš <w1benny@xxxxxxxxx>

Changes since v2:
- Reset entry->pw in all cases in p2m_set_entry, except for p2m_access_r_pw

Changes since v1:
- Added signed-off-by tags

This patch introduces a new XENMEM_access_r_pw permission. Functionally, it is 
similar to XENMEM_access_r, but for processors with 
TERTIARY_EXEC_EPT_PAGING_WRITE support (Intel 12th Gen/Alder Lake and later), 
it also permits the CPU to write to the page during guest page-table walks 
(e.g., updating A/D bits) without triggering an EPT violation.

This behavior works by both enabling the EPT paging-write feature and setting 
the EPT paging-write flag in the EPT leaf entry.

This feature provides a significant performance boost for introspection tools that monitor guest 
page-table updates. Previously, every page-table modification by the guest—including routine 
updates like setting A/D bits—triggered an EPT violation, adding unnecessary overhead. The new 
XENMEM_access_r_pw permission allows these "uninteresting" updates to occur without EPT 
violations, improving efficiency.

Considering that this feature provides a significant performance boost for 
introspection tools probably we could consider to take it to current release.

I see that the patch series was acked-by "Acked-by: Tamas K Lengyel 
<tamas@xxxxxxxxxxxxx>" but based on the change log it is not clear when exactly

before Feature freeze date or not. ( and I don't see any reply from Tamas ).
I've acked the patch Thu, Dec 19, 2024.

In this case, I believe we should consider including it in the current release, as it was technically ready for merging before the Feature Freeze deadline.

I would like to kindly ask the x86 maintainers for clarification on why this patch series was not merged.

~ Oleksii



 


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