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Re: [PATCH for-4.20] x86/traps: Rework LER initialisation and support Zen5/Diamond Rapids
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 6 Jan 2025 11:44:32 +0100
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- Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>, Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Mon, 06 Jan 2025 10:44:36 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 31.12.2024 23:25, Marek Marczykowski-Górecki wrote:
> On Tue, Dec 31, 2024 at 07:20:02PM +0000, Andrew Cooper wrote:
>> @@ -2201,6 +2155,42 @@ void __init init_idt_traps(void)
>> this_cpu(compat_gdt) = boot_compat_gdt;
>> }
>>
>> +static void __init init_ler(void)
>> +{
>> + unsigned int msr = 0;
>> +
>> + if ( !opt_ler )
>> + return;
>> +
>> + /*
>> + * Intel Pentium 4 is the only known CPU to not use the architectural
>> MSR
>> + * indicies.
>> + */
>> + switch ( boot_cpu_data.x86_vendor )
>> + {
>> + case X86_VENDOR_INTEL:
>> + if ( boot_cpu_data.x86 == 0xf )
>> + {
>> + ler_msr = MSR_P4_LER_FROM_LIP;
>
> msr =
>
> and ...
>
>> + break;
>> + }
>> + fallthrough;
>> + case X86_VENDOR_AMD:
>> + case X86_VENDOR_HYGON:
>> + ler_msr = MSR_IA32_LASTINTFROMIP;
>
> ... here?
And then
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
preferably with ...
>> + break;
>> + }
>> +
>> + if ( msr == 0 )
>> + {
>> + printk(XENLOG_WARNING "LER disabled: failed to identy MSRs\n");
... (nit) s/identy/identify/ as well.
Jan
|
