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[PATCH v1 3/5] xen/arm: platforms: Add NXP S32CC platform code


  • To: xen-devel@xxxxxxxxxxxxxxxxxxxx
  • From: "Andrei Cherechesu (OSS)" <andrei.cherechesu@xxxxxxxxxxx>
  • Date: Tue, 10 Sep 2024 17:34:09 +0300
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  • Cc: S32@xxxxxxx, andrei.cherechesu@xxxxxxxxxxx, Andrei Cherechesu <andrei.cherechesu@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Tue, 10 Sep 2024 14:34:44 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

From: Andrei Cherechesu <andrei.cherechesu@xxxxxxx>

Added support for NXP S32CC platforms (S32G2, S32G3, S32R45),
which need SCMI over SMC calls forwarded to the firmware
running at EL3 (TF-A). Linux relies on the SCMI Platform
for system services such as clocking, reset, etc.

S32CC platforms use the NXP LINFlexD UART driver for
console by default.

Signed-off-by: Andrei Cherechesu <andrei.cherechesu@xxxxxxx>
---
 xen/arch/arm/platforms/Kconfig  | 10 ++++
 xen/arch/arm/platforms/Makefile |  1 +
 xen/arch/arm/platforms/s32cc.c  | 84 +++++++++++++++++++++++++++++++++
 3 files changed, 95 insertions(+)
 create mode 100644 xen/arch/arm/platforms/s32cc.c

diff --git a/xen/arch/arm/platforms/Kconfig b/xen/arch/arm/platforms/Kconfig
index 76f7e76b1b..310b35122a 100644
--- a/xen/arch/arm/platforms/Kconfig
+++ b/xen/arch/arm/platforms/Kconfig
@@ -37,6 +37,13 @@ config MPSOC
        help
        Enable all the required drivers for Xilinx Ultrascale+ MPSoC
 
+config S32CC
+       bool "NXP S32CC platforms support"
+       depends on ARM_64
+       select HAS_LINFLEX
+       help
+       Enable all the required drivers for NXP S32CC platforms
+
 config NO_PLAT
        bool "No Platforms"
        help
@@ -56,3 +63,6 @@ config MPSOC_PLATFORM
        bool
        default (ALL64_PLAT || MPSOC)
 
+config S32CC_PLATFORM
+       bool
+       default (ALL64_PLAT || S32CC)
diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile
index bec6e55d1f..2c304b964d 100644
--- a/xen/arch/arm/platforms/Makefile
+++ b/xen/arch/arm/platforms/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_ALL64_PLAT) += thunderx.o
 obj-$(CONFIG_ALL64_PLAT) += xgene-storm.o
 obj-$(CONFIG_ALL64_PLAT) += brcm-raspberry-pi.o
 obj-$(CONFIG_ALL64_PLAT) += imx8qm.o
+obj-$(CONFIG_S32CC_PLATFORM)  += s32cc.o
 obj-$(CONFIG_MPSOC_PLATFORM)  += xilinx-zynqmp.o
 obj-$(CONFIG_MPSOC_PLATFORM)  += xilinx-zynqmp-eemi.o
diff --git a/xen/arch/arm/platforms/s32cc.c b/xen/arch/arm/platforms/s32cc.c
new file mode 100644
index 0000000000..f262673b09
--- /dev/null
+++ b/xen/arch/arm/platforms/s32cc.c
@@ -0,0 +1,84 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * xen/arch/arm/platforms/s32cc.c
+ *
+ * NXP S32CC Platform-specific settings
+ *
+ * Andrei Cherechesu <andrei.cherechesu@xxxxxxx>
+ * Copyright 2021-2024 NXP
+ */
+
+#include <asm/platform.h>
+#include <asm/regs.h>
+#include <asm/smccc.h>
+
+#define S32CC_SMC_SCMI_FN   0xFE
+#define S32CC_SMCCC_FID(fn) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+                                               ARM_SMCCC_CONV_64,   \
+                                               ARM_SMCCC_OWNER_SIP, \
+                                               fn)
+
+static bool s32cc_smc(struct cpu_user_regs *regs)
+{
+    struct arm_smccc_res res;
+    uint32_t fid = get_user_reg(regs, 0);
+
+    /* Check for SMCCC 1.1 availability */
+    if ( !cpus_have_const_cap(ARM_SMCCC_1_1) )
+    {
+        printk_once(XENLOG_WARNING
+                    "S32CC: No SMCCC 1.1 support, disabling fw calls.");
+        return false;
+    }
+
+    switch ( fid )
+    {
+    /* SCMI */
+    case S32CC_SMCCC_FID(S32CC_SMC_SCMI_FN):
+        goto forward_to_fw;
+
+    default:
+        printk_once(XENLOG_WARNING "S32CC: Unhandled SMC call: %u\n", fid);
+        return false;
+    }
+
+forward_to_fw:
+    arm_smccc_1_1_smc(fid,
+                      get_user_reg(regs, 1),
+                      get_user_reg(regs, 2),
+                      get_user_reg(regs, 3),
+                      get_user_reg(regs, 4),
+                      get_user_reg(regs, 5),
+                      get_user_reg(regs, 6),
+                      get_user_reg(regs, 7),
+                      &res);
+
+    set_user_reg(regs, 0, res.a0);
+    set_user_reg(regs, 1, res.a1);
+    set_user_reg(regs, 2, res.a2);
+    set_user_reg(regs, 3, res.a3);
+
+    return true;
+}
+
+static const char * const s32cc_dt_compat[] __initconst =
+{
+    "nxp,s32g2",
+    "nxp,s32g3",
+    "nxp,s32r45",
+    NULL
+};
+
+PLATFORM_START(s32cc, "NXP S32CC")
+    .compatible = s32cc_dt_compat,
+    .smc = s32cc_smc,
+PLATFORM_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
\ No newline at end of file
-- 
2.45.2




 


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