[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3 7/9] xen/riscv: introduce and init SBI RFENCE extension
On Tue, 2024-07-30 at 11:17 +0200, Jan Beulich wrote: > > > > + > > > > +static void sbi_cpumask_to_hartmask(const struct cpumask > > > > *cmask, > > > > + struct cpumask *hmask) > > > > > > I doubt it is valud to re-use struct cpumask for hart maps. > > Why not? Would it be better to use unsigned long *hmask? > > It's not only better, but imo a requirement. Unless there's a > guarantee > by the spec that hart IDs for any subset of harts are sequential and > starting from 0, you just can't assume they fall in the [0,NR_CPUS) > or > really [0,nr_cpu_ids) range. Yet without that you simply can't > (ab)use > struct cpumask (and btw it wants to be cpumask_t everywhere). > > You may want to take a look at struct physid_mask that we have on x86 > for the equivalent purpose. Could you please explain me why factor 4 is used in defintion of MAX_APICS and why 256 ( is it a maximum number of APIC IDs can be supported in the system? ): #define MAX_APICS MAX(256, 4 * NR_CPUS) ~ Oleksii
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