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Re: [PATCH 01/12] xen/arm: add cache coloring initialization
- To: Wei Chen <Wei.Chen@xxxxxxx>, Carlo Nonato <carlo.nonato@xxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 26 Sep 2022 09:42:42 +0200
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- Cc: andrew.cooper3@xxxxxxxxxx, george.dunlap@xxxxxxxxxx, julien@xxxxxxx, stefano.stabellini@xxxxxxx, wl@xxxxxxx, marco.solieri@xxxxxxxxxx, andrea.bastoni@xxxxxxxxxxxxxxx, lucmiccio@xxxxxxxxx, Marco Solieri <marco.solieri@xxxxxxxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Mon, 26 Sep 2022 07:42:44 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 26.09.2022 08:20, Wei Chen wrote:
> On 2022/8/26 20:51, Carlo Nonato wrote:
>> --- a/xen/arch/arm/Kconfig
>> +++ b/xen/arch/arm/Kconfig
>> @@ -131,6 +131,22 @@ config ARM64_BTI
>> Branch Target Identification support.
>> This feature is not supported in Xen.
>>
>> +config CACHE_COLORING
>> + bool "Last Level Cache (LLC) coloring" if EXPERT
>> + default n
No need for this line, btw.
>> + depends on ARM_64
>> +
>> +config MAX_CACHE_COLORS
>> + int "Maximum number of cache colors"
>> + default 128
>> + range 0 65536
>
> Just curious. Why select 128 as default vaule here? Is it a classic
> implmenntation for Arm64 cache? And the same question for the upper
> bound 65536.
Going beyond that: What is the meaning of the user picking 0 here?
And isn't 1 merely mapping to the allocator we have, i.e. the
CACHE_COLORING=n case? IOW shouldn't the lowe bound of the range
be (at least) 2?
Jan
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