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Re: [PATCH v6 10/10] drivers/char: use smp barriers in xhci driver
- To: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Tue, 6 Sep 2022 11:23:38 +0200
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, George Dunlap <george.dunlap@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Tue, 06 Sep 2022 21:39:39 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 02.09.2022 15:17, Marek Marczykowski-Górecki wrote:
> All (interesting) data is in plain WB cached memory, and the few BAR
> register that are configured have a UC mapping, which orders properly
> WRT other writes on x86.
>
> Suggested-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Signed-off-by: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
As said in reply to Andrew's comment: What about non-x86? Drivers like
this one, even if presently depending on X86 in Kconfig, shouldn't be
making assumptions like this. Such is imo only appropriate when a
driver conceivably would only ever be useful on x86.
Jan
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