Re: x86/PV: (lack of) MTRR exposure

[Juergen Gross <jgross@xxxxxxxx>]

On 28.04.22 17:53, Jan Beulich wrote:
> Hello,
>
> in the course of analyzing the i915 driver causing boot to fail in
> Linux 5.18 I found that Linux, for all the years, has been running
> in PV mode as if PAT was (mostly) disabled. This is a result of
> them tying PAT initialization to MTRR initialization, while we
> offer PAT but not MTRR in CPUID output. This was different before
> our moving to CPU featuresets, and as such one could view this
> behavior as a regression from that change.
>
> The first question here is whether not exposing MTRR as a feature
> was really intended, in particular also for PV Dom0. The XenoLinux
> kernel and its forward ports did make use of XENPF_*_memtype to
> deal with MTRRs. That's functionality which (maybe for a good
> reason) never made it into the pvops kernel. Note that PVH Dom0
> does have access to the original settings, as the host values are
> used as initial state there.
>
> The next question would be how we could go about improving the
> situation. For the particular issue in 5.18 I've found a relatively
> simple solution [1] (which also looks to help graphics performance
> on other systems, according to my initial observations with using
> the change), albeit its simplicity likely means it either is wrong
> in some way, or might not be liked for looking hacky and/or abusive.
> We can't, for example, simply turn on the MTRR bit in CPUID, as that
> would implicitly lead to the kernel trying to write the PAT MSR (if,
> see below, it didn't itself zap the bit). We also can't simply
> ignore PAT MSR writes, as the kernel won't check whether writes
> actually took effect. (All of that did work on top of old Xen
> apparently only because xen_init_capabilities() itself also forces
> the MTRR feature to off.)
I've sent an alternative patch addressing this problem:

https://lore.kernel.org/lkml/20220503132207.17234-3-jgross@xxxxxxxx/T/#u

Lets see whether it is accepted.


Juergen

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