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[PATCH 0/3] x86/cpuid: Disntangle, and PPIN
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Thu, 27 Jan 2022 16:09:37 +0000
- Authentication-results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Delivery-date: Thu, 27 Jan 2022 16:10:01 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Work to disentangle new feature addition, using PPIN as an example.
Andrew Cooper (1):
x86/cpuid: Disentangle logic for new feature leaves
Jan Beulich (2):
x86/cpuid: Infrastructure for leaf 0x00000007:1.ebx
x86/Intel: use CPUID bit to determine PPIN availability
tools/misc/xen-cpuid.c | 6 +++
xen/arch/x86/cpu/common.c | 57 +++++++++++++++--------------
xen/arch/x86/cpu/mcheck/mce_intel.c | 10 ++++-
xen/include/public/arch-x86/cpufeatureset.h | 3 ++
xen/include/xen/lib/x86/cpuid.h | 7 ++++
xen/tools/gen-cpuid.py | 2 +
6 files changed, 56 insertions(+), 29 deletions(-)
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2.11.0
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