[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 1/2] x86/Intel: Sapphire Rapids Xeons also support PPIN
- To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- Date: Wed, 26 Jan 2022 23:01:11 +0000
- Accept-language: en-GB, en-US
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vyIrf5WQuqLKHDNniuuW9zi6d0mYsluPDskZtluFvS4=; b=N9ctVI68rExuh9P9D1K3+KHOgHrtwf9WXjlVuPPM3Zepw9aYRDX8/dyYUiiPxUvC86eTOts0UCFLLX2VnTqOjpz6j9vlhi/fLG55eWupiGUlGcGkbJTFPGKCISCi/hm+mv92Bii9u4bjDmInpXRLrspODi5Fb8c+gdWmp6oxlZDoju/81uMx+V42LY4HuiiiY4QOjg9/Lhp+7Ad3k5cFuMdATVsq0JZT1yJgJb2AV9tP66igPozF7MwWOACErR1Kxw/u2hmLgE5R/C2a+yAobce+AiEiyxBcK1LlxbTI+j4gngW+xL9QDSpN5adRvTm/GYyhD848gbg82xSzeQ+hbQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YMqjsyICpmme3qIZlMwpd3HKlLjaVREBslIC21Fr4j71kPxrjmN+a3F/IAn8RCYifMX/mBzyivv7DBesSiq8eMClns4HGg+F3CBj4ZUhvLjVBtcd/X6sDhNLzHZN5zC0m84hyFoQJsB1dCwtbjh+pwWm7gYAJ4bM2INRkcRHIvGXTv4lG0/NZ+m/8Q4klO1QVBuxE0L85apd8Fg+Gi8tHxGhL+5H/U8ZgbTKiuVMaPvMh37EAJtwJrmSB4a9hOZUO3bdOZr3C09DP8tScwDMmW2BXvyD1SgjprAclgkGTG1Hu76V92SvteTO+udpKdTQP2BWpC8cPs7gmeD8fe/x1A==
- Authentication-results: esa5.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: Wei Liu <wl@xxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>
- Delivery-date: Wed, 26 Jan 2022 23:01:42 +0000
- Ironport-data: A9a23:k2OyWKqVdNNNbs/iiCgiTVGItR9eBmL1YhIvgKrLsJaIsI4StFCzt garIBmGPanfZDD0L40jb4ngphxSupPcx9ZiQAM+rH1gEi4VpZuZCYyVIHmrMnLJJKUvbq7GA +byyDXkBJppJpMJjk71atANlZT4vE2xbuKU5NTsY0idfic5Dndx4f5fs7Rh2NQw2ILnW1jlV e7a+KUzBnf0g1aYDUpMg06zgEsHUCPa4W5wUvQWPJinjXeG/5UnJMt3yZKZdhMUdrJ8DO+iL 9sv+Znilo/vE7XBPfv++lrzWhVirrc/pmFigFIOM0SpqkAqSiDfTs/XnRfTAKtao2zhojx/9 DlCnd+gWEQVAqLlo8VHSyJIN3xjYKtg0qCSdBBTseTLp6HHW37lwvEoB0AqJ4wIvO1wBAmi9 9RBdmpLNErawbvrnvTrEYGAhex6RCXvFKoZtmtt0nfyCvE+TIqYa67L+cVZzHE7gcUm8fP2O ZBCMGA/PEWojxtnZXY4Kphmp9uTrEbfcxFIpwjSq7dw2j2GpOB2+Oe0a4eEEjCQfu1Kmm6Iq 2SA+H72ajkKOdraxTeb/3aEgu7UgTi9SI8UDKe/9PNhnBuU3GN7IB8cWEa/oPK5olWjQN8ZI EsRkhfCtoBrqhbtFIOkGUTl/jjU5XbwRua8DcV5+BDO9pbbyj24XHA/XhocdYEgkuUpEGlCO kCyo/vlAjlmsbuwQH2b96uJoT7aBRX5PVPudgdfE1JbvoCLTJUby0uWE409SPLdYsjdRGmoq w1muhTSkFn6YSQj86ygtW7KjDu3znQiZl5kv16HNo5JA+4QWWJEW2BKwQSKhRqjBNzAJrVkg JTis5LPhAzpJcrV/BFhuM1XQNmUCw+taVUwe2JHEZg77CiK8HW+Z41W6zwWDB43bp1dImK3P BOO6Vw5CHpv0J2CN/4fj2WZUJxC8EQdPY69CqC8giRmP/CdizNrDAkxPBXNjggBYWAnkL0lO IfzTCpfJS1yNEiT9xLvH711+eZynkgWnDqPLbimkUjP+efANRa9FOdUWHPTP7tRxP7V/23oH yN3apHiJ+N3CrOuO0E6MOc7cDg3EJTMLcmm8pMMLr/afFMO9aNII6a5/I7NsrdNxsx9vuzJ4 mu8Sglfzl/+jmfAMgKEdjZob7aHYHq1hSxT0fUEMQn61n49T5yo6atDJZI7caN+rL5ozOJuT ulDcMKFW6wdRjPC8jUbTJ/8sI09K0j72VPQZ3KoMGolYpptZw3V4du4LAHhwzYDU3isvswkr rz+ig6CGcgfRx5vBdr9Ye60yw/jpmAUne9/BhOaItRadEj23pJtLij90q0+L80WcE2RzTqGz QeGRxwfoLCV8YMy9dDIg4GCrpuoTLQiThYLQTGD4O/vZyfA/2elzYtRa8qyfGjQBDHu5aGvR eRJ1PWgYvcJq0lH7thnGLFxwKNgu9a2/+1Gzh5pFWngZkiwDu8yOWGP2MRCu/EfxrJdvgfqC EuD9sMDZOeMMcLhVlUQOBAkfqKI0vRNwmve6vE8IUPb4i5r/eXYDRUObkfU0CENfqFoNI4Fw Ps6vJ9E4gOyvRMmL9Kag30G7G+LNHEBD/0qu5xy7FUHUeb3JoWuuaDhNxI=
- Ironport-hdrordr: A9a23:Ivp8BamhRCZM8X4zJsqhJAdZl/HpDfOIimdD5ihNYBxZY6Wkfp +V88jzhCWZtN9OYhwdcIi7SdS9qXO1z+8R3WGIVY3SEjUOy1HYUL2KirGSggEIeheOudK1sJ 0PT0EQMqyIMbEXt7eY3OD8Kadb/DDlytHpuQ699QYUcegCUcgJhG0ZajpzUHcGPzWubaBJTq Z0jfA3wwZIDE5nCPhTcUN1ONQryee79q7OUFojPVoK+QOOhTSn5PrRCB6DxCoTVDtJ3PML7X XFuxaR3NThj9iLjjvnk0PD5ZVfn9XsjvFZAtaXt8QTIjLwzi61eYVaXaGYtjxdmpDs1L9qqq iIn/4TBbU115rjRBDynfIr4Xi47N8a0Q6n9bZfuwq6nSW2fkNgNyMLv/MnTvKQ0TtfgDg76t MX44vRjesmMfuL9h6NluTgRlVkkFG5rmEllvNWh3tDUZEGYLsUtoAH+lhJea1wVh4SxbpXWN WGNvusr8q+sGnqG0zxry1q2pihT34zFhCJTgwLvdGUySFfmDR8w1EDzMISk38c/NZlIqM0q9 jsI+BtjvVDX8UWZaVyCKMIRta2EHXERVbJPHiJKVrqGakbMzbGqoLx4r8y+Oa2EaZ4gacaid DEShdVpGQyc0XhBYmH24BK6AnERCGnUTHk2qhlltFEU33HNczW2AG4OSITevqb0oIi65fgKo WO0bptcoreEVc=
- Ironport-sdr: pASMY2BuTmYKOf+g06nuIod8aJtMytsJbHKPIsPF4hUuETAPBMa0QykhK4OKcBvsPnG7aCQqsw xUaaZQBiy9JPveaAb+iqBagMft0FXTPPzBkAy6RnjFuR3bqVsoud3YLoI2+kuHkbxOMNyGQ9Bc 3hAv6TBSa0CYxgifndEDV6CMzOwqC1W/ENtUPLoZAs05TR1eVwZqtivat+X295/w06d2Kc7VwK T6KCkroxldovm4weUNLI2NHE2ce5D3MAQ6zxO5FmlFEeX3qv+7MVq6iVzX494bMY2NmlZHdinp w9tXy/960pf0zCwe/H5FmZdD
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHYDghfa/pC6q0h6U+J6bRuWTmtTax19SeA
- Thread-topic: [PATCH v2 1/2] x86/Intel: Sapphire Rapids Xeons also support PPIN
On 20/01/2022 14:16, Jan Beulich wrote:
> This is as per Linux commit a331f5fdd36d ("x86/mce: Add Xeon Sapphire
> Rapids to list of CPUs that support PPIN") just in case a subsequent
> change making use of the respective new CPUID bit doesn't cover this
> model.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Sadly,
https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?h=x86/urgent&id=e464121f2d40eabc7d11823fb26db807ce945df4
IceLake-D too.
Preferably with this fixed, Acked-by: Andrew Cooper
<andrew.cooper3@xxxxxxxxxx> (to save a trivial repost), but ...
> ---
> It is unclear to me whether this change is actually made obsolete by the
> subsequent one adding support for the respective new CPUID bit.
... Sapphire Rapids doesn't enumerate PPIN. Hopefully Granite Rapids
will, but everything SPR and older will have to rely on model checks only.
Probably best to drop the second half of the commit message to remove
the uncertainty.
> It also continues to be unclear for which CPU models, if any, the
> PPIN_CAP bit in PLATFORM_INFO could be used in favor of a model check.
Presumably none, because you need the same set of model checks to
interpret the PPIN bit in PLATFORM_INFO. It does beg the question what
the point of the bit is...
~Andrew
|
