[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 2/3] x86/smpboot: Allow making an INIT IPI conditional
A subsequent change is going to introduce SKINIT support, wherein the APs will be already be in the wait-for-SIPI state, and an INIT must not be sent. Introduce a send_INIT boolean, so we can control sending an INIT IPI separately from sending SIPIs. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- CC: Jan Beulich <JBeulich@xxxxxxxx> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx> CC: Wei Liu <wl@xxxxxxx> CC: Marek Kasiewicz <marek.kasiewicz@xxxxxxxxx> CC: Norbert Kamiński <norbert.kaminski@xxxxxxxxx> CC: Michal Zygowski <michal.zygowski@xxxxxxxxx> CC: Piotr Krol <piotr.krol@xxxxxxxx> CC: Krystian Hebel <krystian.hebel@xxxxxxxxx> CC: Daniel P. Smith <dpsmith@xxxxxxxxxxxxxxxxxxxx> CC: Rich Persaud <persaur@xxxxxxxxx> CC: Christopher Clark <christopher.w.clark@xxxxxxxxx> --- xen/arch/x86/smpboot.c | 78 ++++++++++++++++++++++++++------------------------ 1 file changed, 41 insertions(+), 37 deletions(-) diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 9eca452ce1..195e3681b4 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -424,6 +424,7 @@ static int wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) { unsigned long send_status = 0, accept_status = 0; int maxlvt, timeout, i; + bool send_INIT = true; /* * Some versions of tboot might be able to handle the entire wake sequence @@ -438,49 +439,52 @@ static int wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) apic_write(APIC_ESR, 0); apic_read(APIC_ESR); - Dprintk("Asserting INIT.\n"); + if ( send_INIT ) + { + Dprintk("Asserting INIT.\n"); - /* - * Turn INIT on target chip via IPI - */ - apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, - phys_apicid); + /* + * Turn INIT on target chip via IPI + */ + apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, + phys_apicid); - if ( !x2apic_enabled ) - { - Dprintk("Waiting for send to finish...\n"); - timeout = 0; - do { - Dprintk("+"); - udelay(100); - send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; - } while ( send_status && (timeout++ < 1000) ); + if ( !x2apic_enabled ) + { + Dprintk("Waiting for send to finish...\n"); + timeout = 0; + do { + Dprintk("+"); + udelay(100); + send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; + } while ( send_status && (timeout++ < 1000) ); - mdelay(10); + mdelay(10); - Dprintk("Deasserting INIT.\n"); + Dprintk("Deasserting INIT.\n"); - apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); + apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); - Dprintk("Waiting for send to finish...\n"); - timeout = 0; - do { - Dprintk("+"); - udelay(100); - send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; - } while ( send_status && (timeout++ < 1000) ); - } - else if ( tboot_in_measured_env() ) - { - /* - * With tboot AP is actually spinning in a mini-guest before - * receiving INIT. Upon receiving INIT ipi, AP need time to VMExit, - * update VMCS to tracking SIPIs and VMResume. - * - * While AP is in root mode handling the INIT the CPU will drop - * any SIPIs - */ - udelay(10); + Dprintk("Waiting for send to finish...\n"); + timeout = 0; + do { + Dprintk("+"); + udelay(100); + send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY; + } while ( send_status && (timeout++ < 1000) ); + } + else if ( tboot_in_measured_env() ) + { + /* + * With tboot AP is actually spinning in a mini-guest before + * receiving INIT. Upon receiving INIT ipi, AP need time to VMExit, + * update VMCS to tracking SIPIs and VMResume. + * + * While AP is in root mode handling the INIT the CPU will drop + * any SIPIs + */ + udelay(10); + } } maxlvt = get_maxlvt(); -- 2.11.0
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