[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 0/4] x86/intr: guest interrupt handling fixes/cleanup
- To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
- Date: Fri, 15 Jan 2021 15:28:16 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=wAi4encjkLP3LlypbkVjVJWyr+I8zR85m/r5pmOXFOI=; b=JHOzQKvdBN5OeGot4UWq6MrhUdw4zKA5Tm9HpQ4cABVGbVBbyBjlSEAPDVM6iJ179SGENnDen9aU8ibQpDnLGMAAbhq5Nr5cGE3sYqN35dIpvYs6vPcXa+lZP8oWxUOLaiNv3QbEQ7xashAn1xUhY/ac5Sn5JoEvpw7ZTGkj5iO3VutSxD8ozrG9gnSUl2VbebLN3bJcpDkAi2zbu2bkFtyVF8CtTqSblFWF/XyEektUI3VdSTCMdAxodCE4mFjRRuQUuZdz9TiuRHzAJcYFdYK/xs6y3+lZ+7d9CaFJgQ+FM8yKPIQHE3QyDRiPmzrk6lnA5oiu0qZmcBcwSVkahQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kidIuS8/xMmYzVRv6Vi7ycVls3PGG3KryfsE4+wSujexzxxnuY3+PCK0KvEg0Tf/NamyX0Z4qW50hustGp1PY+uSwr+BYCynfqyTozUDBkijkoA4K42vO3oXuVSkC5L2rJNVCrfIEGbfAKl7AyEsvMhtfLZyS3WQ38LAx4hrvFmtHjwmdDz/Qk7E1aR+ZeblbX82toNeyLikJ/EX7+1mt/fsBj/ML1H2WmqZwESl5JF5vAL0uwfvY/UQJsoD+aOssDfzPk4c/ejolsM2eBxzhxHEo3PzrGGV/vkolahzcxp4ruPClCplLF5EOtgAvXwGVtj0Tfmbp0n3xx+yfn7WrQ==
- Authentication-results: esa4.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: Roger Pau Monne <roger.pau@xxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>, Paul Durrant <paul@xxxxxxx>
- Delivery-date: Fri, 15 Jan 2021 14:29:00 +0000
- Ironport-sdr: JoZlehRoyqBWmLLp1bqGxM252AX3bxSwrfwA9pt+dR3g/TuNkMax8IK7ozJlao9aT3ynmBjHgd u+7zdZJKZwe7lv0V6ilGdaixtYYMNYYAy/P7Iq46vwzJex/2kC0WAII/Uf1G6jE98d4t2NTmZO cFCTeXNubGIMHM9iUGDf7VMZAnKvn9Y07F9SurQ8PXEzT474MFrFredu+u5nM2YGJtfG+hZKOu a/Q2ysTU492/EBomoHTHT1xQ5twBxx5uPi4jXHv3VjTF5nrHb1j7GjkDAN63ChT1L4kvqStIOf ypA=
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Hello,
The following series aims to fix some shortcomings of guest interrupt
handling when using passthrough devices. The first 3 patches are
bugfixes, which I think should solve the issue(s) that caused the dpci
EOI timer to be introduced. However neither me nor others seem to be able
to reproduce the original issue, so it's hard to tell.
It's my opinion that we should remove the timer and see what explodes
(if anything). That's the only way we will be able to figure out what
the original issue was, and how to fix it without introducing yet
another per-guest-irq related timer.
Thanks, Roger.
Roger Pau Monne (4):
x86/vioapic: check IRR before attempting to inject interrupt after EOI
x86/vioapic: issue EOI to dpci when switching pin to edge trigger mode
x86/vpic: issue dpci EOI for cleared pins at ICW1
x86/dpci: remove the dpci EOI timer
xen/arch/x86/hvm/vioapic.c | 13 +++-
xen/arch/x86/hvm/vpic.c | 21 ++++++
xen/drivers/passthrough/vtd/x86/hvm.c | 3 -
xen/drivers/passthrough/x86/hvm.c | 95 +--------------------------
xen/include/asm-x86/hvm/irq.h | 3 -
xen/include/xen/iommu.h | 5 --
6 files changed, 35 insertions(+), 105 deletions(-)
--
2.29.2
|
