Re: [PATCH v2 2/8] x86/svm: silently drop writes to SYSCFG and related MSRs

[Jan Beulich <jbeulich@xxxxxxxx>]

On 31.08.2020 16:37, Roger Pau Monné wrote:
> On Thu, Aug 27, 2020 at 05:03:50PM +0200, Jan Beulich wrote:
>> On 20.08.2020 17:08, Roger Pau Monne wrote:
>>> --- a/xen/arch/x86/hvm/svm/svm.c
>>> +++ b/xen/arch/x86/hvm/svm/svm.c
>>> @@ -1917,6 +1917,21 @@ static int svm_msr_read_intercept(unsigned int msr, 
>>> uint64_t *msr_content)
>>>              goto gpf;
>>>          break;
>>>  
>>> +    case MSR_K8_TOP_MEM1:
>>> +    case MSR_K8_TOP_MEM2:
>>> +        *msr_content = 0;
>>> +        break;
>>
>> Any reason you don't fold this with ...
>>
>>> +    case MSR_K8_SYSCFG:
>>> +        /*
>>> +         * Return MtrrFixDramEn: albeit the current emulated MTRR
>>> +         * implementation doesn't support the Extended Type-Field Format 
>>> having
>>> +         * such bit set is common on AMD hardware and is harmless as long 
>>> as
>>> +         * MtrrFixDramModEn isn't set.
>>> +         */
>>> +        *msr_content = K8_MTRRFIXRANGE_DRAM_ENABLE;
>>> +        break;
>>> +
>>>      case MSR_K8_VM_CR:
>>>          *msr_content = 0;
>>>          break;
>>
>> ... this existing case, and ...
> 
> I was trying to sort them by value, but I can certainly merge this and
> the case below.

Sorting by number is helpful as a secondary criteria, but I think groups
of registers wanting to be handled the same should go together. This is
especially looking forward, where otherwise many instances of the same
(trivial or not) logic may appear.

Jan