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Re: [PATCH v2 2/8] x86/svm: silently drop writes to SYSCFG and related MSRs



On 20.08.2020 17:08, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -1917,6 +1917,21 @@ static int svm_msr_read_intercept(unsigned int msr, 
> uint64_t *msr_content)
>              goto gpf;
>          break;
>  
> +    case MSR_K8_TOP_MEM1:
> +    case MSR_K8_TOP_MEM2:
> +        *msr_content = 0;
> +        break;

Any reason you don't fold this with ...

> +    case MSR_K8_SYSCFG:
> +        /*
> +         * Return MtrrFixDramEn: albeit the current emulated MTRR
> +         * implementation doesn't support the Extended Type-Field Format 
> having
> +         * such bit set is common on AMD hardware and is harmless as long as
> +         * MtrrFixDramModEn isn't set.
> +         */
> +        *msr_content = K8_MTRRFIXRANGE_DRAM_ENABLE;
> +        break;
> +
>      case MSR_K8_VM_CR:
>          *msr_content = 0;
>          break;

... this existing case, and ...

> @@ -2094,6 +2109,12 @@ static int svm_msr_write_intercept(unsigned int msr, 
> uint64_t msr_content)
>              goto gpf;
>          break;
>  
> +    case MSR_K8_TOP_MEM1:
> +    case MSR_K8_TOP_MEM2:
> +    case MSR_K8_SYSCFG:
> +        /* Drop writes. */
> +        break;
> +
>      case MSR_K8_VM_CR:
>          /* ignore write. handle all bits as read-only. */
>          break;

... similarly these?

Jan



 


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