Re: [PATCH for-4.14] x86/msr: Disallow access to Processor Trace MSRs

[Jan Beulich <jbeulich@xxxxxxxx>]

On 19.06.2020 13:58, Andrew Cooper wrote:
> --- a/xen/arch/x86/msr.c
> +++ b/xen/arch/x86/msr.c
> @@ -168,6 +168,12 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t 
> *val)
>      case MSR_TSX_FORCE_ABORT:
>      case MSR_TSX_CTRL:
>      case MSR_MCU_OPT_CTRL:
> +    case MSR_RTIT_OUTPUT_BASE:
> +    case MSR_RTIT_OUTPUT_MASK:
> +    case MSR_RTIT_CTL:
> +    case MSR_RTIT_STATUS:
> +    case MSR_RTIT_CR3_MATCH:
> +    case MSR_RTIT_ADDR_A(0) ... MSR_RTIT_ADDR_B(3):

The respective CPUID field is 3 bits wide, so wouldn't it be better
to cover the full possible range (0...6 afaict)?

Jan