[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH] x86/Intel: insert Ice Lake and Comet Lake model numbers
On Fri, Jun 05, 2020 at 10:54:22AM +0200, Jan Beulich wrote: > On 05.06.2020 10:46, Roger Pau Monné wrote: > > On Fri, Jun 05, 2020 at 10:10:01AM +0200, Jan Beulich wrote: > >> On 05.06.2020 10:02, Roger Pau Monné wrote: > >>> On Fri, Jun 05, 2020 at 09:51:09AM +0200, Jan Beulich wrote: > >>>> Both match prior generation processors as far as LBR and C-state MSRs > >>>> go (SDM rev 072) as well as applicability of the if_pschange_mc erratum > >>>> (recent spec updates). > >>>> > >>>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> > >>>> --- > >>>> Such changes having been subject to backporting in the past, this > >>>> change may want considering for 4.14. > >>>> --- > >>>> I'm leaving alone spec_ctrl.c, albeit there's a scary looking erratum > >>>> for Ice Lake indicating that MDS_NO may wrongly be set. But this is > >>>> apparently addressed by ucode update, so we may not need to deal with > >>>> it in software. > >>>> > >>>> --- a/xen/arch/x86/acpi/cpu_idle.c > >>>> +++ b/xen/arch/x86/acpi/cpu_idle.c > >>> > >>> What about mwait-idle? I guess we pick that from Linux and no patch > >>> has been added so far? > >> > >> Correct. I've looked at recent history there, and I'm uncertain they'll > >> add further models there. They look to prefer to use ACPI _CST now again > >> with, as it seems, not overly much of a difference to the ACPI driver > >> (which, if we were to follow, I'd rather see us integrate there). > > > > Urg, OK, that's a shame as using mwait-idle was IMO better from a Xen > > PoV as we didn't rely on dom0 in order to discover C states. I wonder > > if we could continue to update mwait-idle on our own for newer models. > > This would be nice indeed, but would require Intel to provide us with > the necessary data. > > > FWIW, wikichip also lists 6c and 6a [0] as Ice Lake Server model versions, > > but I'm not sure if this has been confirmed in any way? > > SDM vol 4 confirms this, but mentions the two model numbers exclusively > in the table matching signatures to model names ("Future Intel Xeon > processors based on Ice Lake microarchitecture"). Without there being an > actual table for these I don't think we should "speculatively" add the > numbers anywhere. Ack. Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> Thanks.
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