[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v5 00/10] x86emul: further work
> -----Original Message----- > From: Jan Beulich <jbeulich@xxxxxxxx> > Sent: 24 March 2020 12:43 > To: xen-devel@xxxxxxxxxxxxxxxxxxxx > Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>; Paul Durrant <paul@xxxxxxx>; > Wei Liu <wl@xxxxxxx>; > Roger Pau Monne <roger.pau@xxxxxxxxxx> > Subject: Re: [PATCH v5 00/10] x86emul: further work > > Paul,On 24.03.2020 13:26, Jan Beulich wrote: > > Some of the later patches are still at least partly RFC, for > > varying reasons (see there). I'd appreciate though if at least > > some of the earlier ones could go in rather sooner than later. > > > > Patch 1 functionally (for the test harness) depends on > > "libx86/CPUID: fix (not just) leaf 7 processing", while at > > least patch 2 contextually depends on "x86emul: disable > > FPU/MMX/SIMD insn emulation when !HVM". > > > > 1: x86emul: support AVX512_BF16 insns > > I should note that I also have a VP2INTERSECT patch ready, but the > just released SDE segfaults when trying to test it. I'll be holding > this back for some more time, I guess. > > > 2: x86emul: support MOVDIRI insn > > 3: x86: determine HAVE_AS_* just once > > 4: x86: move back clang no integrated assembler tests > > 5: x86emul: support MOVDIR64B insn > > 6: x86emul: support ENQCMD insn > > 7: x86/HVM: scale MPERF values reported to guests (on AMD) > > 8: x86emul: support RDPRU > > 9: x86/HVM: don't needlessly intercept APERF/MPERF/TSC MSR reads > > 10: x86emul: support MCOMMIT > > Paul, I should also note that I mistakenly Cc-ed your old Citrix > address. I'd like to avoid re-posting the series - do you perhaps > nevertheless get the xen-devel copies? > Yeah I have them. My filters just moved them into my general 'xen' mailbox but I got them. Paul > Jan
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