[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 00/10] x86: AMD x2APIC support
Despite the title this is actually all AMD IOMMU side work; all x86 side adjustments have already been carried out. 1: AMD/IOMMU: restrict feature logging 2: AMD/IOMMU: use bit field for extended feature register 3: AMD/IOMMU: use bit field for control register 4: AMD/IOMMU: use bit field for IRTE 5: AMD/IOMMU: introduce 128-bit IRTE non-guest-APIC IRTE format 6: AMD/IOMMU: split amd_iommu_init_one() 7: AMD/IOMMU: allow enabling with IRQ not yet set up 8: AMD/IOMMU: adjust setup of internal interrupt for x2APIC mode 9: AMD/IOMMU: enable x2APIC mode when available 10: AMD/IOMMU: correct IRTE updating Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |