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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 03/16] x86: make traps.c build with !CONFIG_PV
Provide a stub for pv_inject_event, put code that accesses PV fields
and GDT / LDT fault handling code under CONFIG_PV.
Signed-off-by: Wei Liu <wei.liu2@xxxxxxxxxx>
---
v2: reduce the amount of ifdefs
---
xen/arch/x86/traps.c | 23 +++++++++++++++++++++++
xen/include/asm-x86/domain.h | 7 +++++++
2 files changed, 30 insertions(+)
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 3988753..002e98f 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1115,6 +1115,7 @@ static void reserved_bit_page_fault(unsigned long addr,
show_execution_state(regs);
}
+#ifdef CONFIG_PV
static int handle_ldt_mapping_fault(unsigned int offset,
struct cpu_user_regs *regs)
{
@@ -1185,6 +1186,7 @@ static int handle_gdt_ldt_mapping_fault(unsigned long
offset,
return EXCRET_fault_fixed;
}
+#endif
#define IN_HYPERVISOR_RANGE(va) \
(((va) >= HYPERVISOR_VIRT_START) && ((va) < HYPERVISOR_VIRT_END))
@@ -1337,8 +1339,15 @@ static int fixup_page_fault(unsigned long addr, struct
cpu_user_regs *regs)
{
if ( !(regs->error_code & (PFEC_user_mode | PFEC_reserved_bit)) &&
(addr >= GDT_LDT_VIRT_START) && (addr < GDT_LDT_VIRT_END) )
+ {
+#ifdef CONFIG_PV
return handle_gdt_ldt_mapping_fault(
addr - GDT_LDT_VIRT_START, regs);
+#else
+ ASSERT_UNREACHABLE();
+ return 0;
+#endif
+ }
return 0;
}
@@ -1494,7 +1503,9 @@ void __init do_early_page_fault(struct cpu_user_regs
*regs)
void do_general_protection(struct cpu_user_regs *regs)
{
+#ifdef CONFIG_PV
struct vcpu *v = current;
+#endif
unsigned long fixup;
if ( debugger_trap_entry(TRAP_gp_fault, regs) )
@@ -1506,6 +1517,7 @@ void do_general_protection(struct cpu_user_regs *regs)
if ( !guest_mode(regs) )
goto gp_in_kernel;
+#ifdef CONFIG_PV
/*
* Cunning trick to allow arbitrary "INT n" handling.
*
@@ -1557,6 +1569,7 @@ void do_general_protection(struct cpu_user_regs *regs)
/* Pass on GPF as is. */
pv_inject_hw_exception(TRAP_gp_fault, regs->error_code);
return;
+#endif
gp_in_kernel:
@@ -1744,7 +1757,9 @@ void unset_nmi_callback(void)
void do_device_not_available(struct cpu_user_regs *regs)
{
+#ifdef CONFIG_PV
struct vcpu *curr = current;
+#endif
if ( !guest_mode(regs) )
{
@@ -1762,6 +1777,7 @@ void do_device_not_available(struct cpu_user_regs *regs)
return;
}
+#ifdef CONFIG_PV
vcpu_restore_fpu_lazy(curr);
if ( curr->arch.pv.ctrlreg[0] & X86_CR0_TS )
@@ -1771,6 +1787,9 @@ void do_device_not_available(struct cpu_user_regs *regs)
}
else
TRACE_0D(TRC_PV_MATH_STATE_RESTORE);
+#else
+ ASSERT_UNREACHABLE();
+#endif
return;
}
@@ -2069,13 +2088,16 @@ void activate_debugregs(const struct vcpu *curr)
if ( boot_cpu_has(X86_FEATURE_DBEXT) )
{
+#ifdef CONFIG_PV
wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, curr->arch.pv.dr_mask[0]);
wrmsrl(MSR_AMD64_DR1_ADDRESS_MASK, curr->arch.pv.dr_mask[1]);
wrmsrl(MSR_AMD64_DR2_ADDRESS_MASK, curr->arch.pv.dr_mask[2]);
wrmsrl(MSR_AMD64_DR3_ADDRESS_MASK, curr->arch.pv.dr_mask[3]);
+#endif
}
}
+#ifdef CONFIG_PV
/*
* Used by hypercalls and the emulator.
* -ENODEV => #UD
@@ -2190,6 +2212,7 @@ long set_debugreg(struct vcpu *v, unsigned int reg,
unsigned long value)
v->arch.debugreg[reg] = value;
return 0;
}
+#endif /* CONFIG_PV */
void asm_domain_crash_synchronous(unsigned long addr)
{
diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h
index e7b8227..b94b2c8 100644
--- a/xen/include/asm-x86/domain.h
+++ b/xen/include/asm-x86/domain.h
@@ -672,7 +672,14 @@ static inline void free_vcpu_guest_context(struct
vcpu_guest_context *vgc)
struct vcpu_hvm_context;
int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context
*ctx);
+#ifdef CONFIG_PV
void pv_inject_event(const struct x86_event *event);
+#else
+static inline void pv_inject_event(const struct x86_event *event)
+{
+ ASSERT_UNREACHABLE();
+}
+#endif
static inline void pv_inject_hw_exception(unsigned int vector, int errcode)
{
--
git-series 0.9.1
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