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Re: [Xen-devel] [PATCH] vt-d: use two 32-bit writes to update DMAR fault address registers

  • To: Jan Beulich <JBeulich@xxxxxxxx>, "Zhang, Haozhong" <haozhong.zhang@xxxxxxxxx>
  • From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
  • Date: Mon, 18 Sep 2017 08:18:29 +0000
  • Accept-language: en-US
  • Cc: "xen-devel@xxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxx>
  • Delivery-date: Mon, 18 Sep 2017 08:18:40 +0000
  • Dlp-product: dlpe-windows
  • Dlp-reaction: no-action
  • Dlp-version:
  • List-id: Xen developer discussion <xen-devel.lists.xen.org>
  • Thread-index: AQHTKsNUpK2gL3UZTUiwepSQePLZ5qKu7ogAgAtoO4A=
  • Thread-topic: [Xen-devel] [PATCH] vt-d: use two 32-bit writes to update DMAR fault address registers

> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: Monday, September 11, 2017 6:03 PM
> >>> On 11.09.17 at 08:00, <haozhong.zhang@xxxxxxxxx> wrote:
> > The 64-bit DMAR fault address is composed of two 32 bits registers
> > DMAR_FEADDR_REG and DMAR_FEUADDR_REG. According to VT-d spec:
> > "Software is expected to access 32-bit registers as aligned doublewords",
> > a hypervisor should use two 32-bit writes to DMAR_FEADDR_REG and
> > DMAR_FEUADDR_REG separately in order to update a 64-bit fault
> address,
> > rather than a 64-bit write to DMAR_FEADDR_REG.
> >
> > Though I haven't seen any errors caused by such one 64-bit write on
> > real machines, it's still better to follow the specification.
> Any sane chipset should split qword accesses into dword ones if
> they can't be handled at some layer. Also if you undo something
> explicitly done by an earlier commit, please quote that commit
> and say what was wrong. After all Kevin as the VT-d maintainer
> agreed with the change back then.
> Jan

I'm OK with this change. As Jan pointed out, please quote earlier
comment in next version.

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