[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 02/12] arm/{v,}gic: switch to plain bool
Signed-off-by: Wei Liu <wei.liu2@xxxxxxxxxx> --- xen/arch/arm/gic-v2.c | 4 ++-- xen/arch/arm/gic-v3.c | 10 +++++----- xen/arch/arm/vgic-v2.c | 4 ++-- xen/arch/arm/vgic-v3.c | 4 ++-- xen/include/asm-arm/gic.h | 2 +- 5 files changed, 12 insertions(+), 12 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index cbe71a9c18..d54db4c80c 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -483,7 +483,7 @@ static void gicv2_write_lr(int lr, const struct gic_lr *lr_reg) writel_gich(lrv, GICH_LR + lr * 4); } -static void gicv2_hcr_status(uint32_t flag, bool_t status) +static void gicv2_hcr_status(uint32_t flag, bool status) { uint32_t hcr = readl_gich(GICH_HCR); @@ -815,7 +815,7 @@ static hw_irq_controller gicv2_guest_irq_type = { .set_affinity = gicv2_irq_set_affinity, }; -static bool_t gicv2_is_aliased(paddr_t cbase, paddr_t csize) +static bool gicv2_is_aliased(paddr_t cbase, paddr_t csize) { uint32_t val_low, val_high; diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index f990eae832..0c5ac1d995 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -261,7 +261,7 @@ static void gicv3_enable_sre(void) static void gicv3_do_wait_for_rwp(void __iomem *base) { uint32_t val; - bool_t timeout = 0; + bool timeout = false; s_time_t deadline = NOW() + MILLISECS(1000); do { @@ -270,7 +270,7 @@ static void gicv3_do_wait_for_rwp(void __iomem *base) break; if ( NOW() > deadline ) { - timeout = 1; + timeout = true; break; } cpu_relax(); @@ -590,7 +590,7 @@ static void __init gicv3_dist_init(void) static int gicv3_enable_redist(void) { uint32_t val; - bool_t timeout = 0; + bool timeout = false; s_time_t deadline = NOW() + MILLISECS(1000); /* Wake up this CPU redistributor */ @@ -604,7 +604,7 @@ static int gicv3_enable_redist(void) break; if ( NOW() > deadline ) { - timeout = 1; + timeout = true; break; } cpu_relax(); @@ -1005,7 +1005,7 @@ static void gicv3_write_lr(int lr_reg, const struct gic_lr *lr) gicv3_ich_write_lr(lr_reg, lrv); } -static void gicv3_hcr_status(uint32_t flag, bool_t status) +static void gicv3_hcr_status(uint32_t flag, bool status) { uint32_t hcr; diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index cf4ab89f81..2bdb25261a 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -33,7 +33,7 @@ #include <asm/vgic-emul.h> static struct { - bool_t enabled; + bool enabled; /* Distributor interface address */ paddr_t dbase; /* CPU interface address & size */ @@ -49,7 +49,7 @@ static struct { void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, paddr_t vbase, uint32_t aliased_offset) { - vgic_v2_hw.enabled = 1; + vgic_v2_hw.enabled = true; vgic_v2_hw.dbase = dbase; vgic_v2_hw.cbase = cbase; vgic_v2_hw.csize = csize; diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index a0cf993d13..af16dfd005 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -52,7 +52,7 @@ #define VGICD_CTLR_DEFAULT (GICD_CTLR_ARE_NS) static struct { - bool_t enabled; + bool enabled; /* Distributor interface address */ paddr_t dbase; /* Re-distributor regions */ @@ -68,7 +68,7 @@ void vgic_v3_setup_hw(paddr_t dbase, uint32_t rdist_stride, unsigned int intid_bits) { - vgic_v3_hw.enabled = 1; + vgic_v3_hw.enabled = true; vgic_v3_hw.dbase = dbase; vgic_v3_hw.nr_rdist_regions = nr_rdist_regions; vgic_v3_hw.regions = regions; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 6203dc59f4..977e75b1d2 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -345,7 +345,7 @@ struct gic_hw_operations { void (*update_lr)(int lr, const struct pending_irq *pending_irq, unsigned int state); /* Update HCR status register */ - void (*update_hcr_status)(uint32_t flag, bool_t set); + void (*update_hcr_status)(uint32_t flag, bool set); /* Clear LR register */ void (*clear_lr)(int lr); /* Read LR register and populate gic_lr structure */ -- 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |