[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote: > This patch implements main data structures of MBA. > > Like CAT features, MBA HW info has cos_max which means the max cos > registers number, and thrtl_max which means the max throttle value Similarly, there is no existence of 'cos register', 'cos number' is even better or anything else. > (delay value). It also has a flag to represent if the throttle > value is linear or not. > > One COS register of MBA stores a throttle value for one or more Ditto. ^s ... > -/* CAT common functions implementation. */ > +/* Implementation of allocation features' functions. */ > static int cat_init_feature(const struct cpuid_leaf *regs, > struct feat_node *feat, > struct psr_socket_info *info, > @@ -289,7 +310,6 @@ static int cat_init_feature(const struct > cpuid_leaf *regs, > if ( !regs->a || !regs->d ) > return -ENOENT; > > - feat->cbm_len = (regs->a & CAT_CBM_LEN_MASK) + 1; Does this have to be moved? ... > + > + feat->cos_reg_val[0] = 0; > + wrmsrl(MSR_IA32_PSR_MBA_MASK(0), 0); It's better to have a comment here to explain what the defaul value '0' stands for in both linear mode and non-linear mode. Chao _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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