Re: [Xen-devel] [PATCH v4 15/17] x86emul: support PCLMULQDQ

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 28/02/17 12:58, Jan Beulich wrote:
> ... and its AVX equivalent.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> ---
> v3: New.
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -393,6 +393,7 @@ static const struct {
>      [0x22] = { .simd_size = simd_none },
>      [0x40 ... 0x41] = { .simd_size = simd_packed_fp },
>      [0x42] = { .simd_size = simd_packed_int },
> +    [0x44] = { .simd_size = simd_packed_int },
>      [0x4a ... 0x4b] = { .simd_size = simd_packed_fp, .four_op = 1 },
>      [0x4c] = { .simd_size = simd_packed_int, .four_op = 1 },
>      [0x60 ... 0x63] = { .simd_size = simd_packed_int, .two_op = 1 },
> @@ -1457,6 +1458,7 @@ static bool vcpu_has(
>  #define vcpu_has_sse()         vcpu_has(         1, EDX, 25, ctxt, ops)
>  #define vcpu_has_sse2()        vcpu_has(         1, EDX, 26, ctxt, ops)
>  #define vcpu_has_sse3()        vcpu_has(         1, ECX,  0, ctxt, ops)
> +#define vcpu_has_pclmulqdq()   vcpu_has(         1, ECX,  1, ctxt, ops)
>  #define vcpu_has_ssse3()       vcpu_has(         1, ECX,  9, ctxt, ops)
>  #define vcpu_has_cx16()        vcpu_has(         1, ECX, 13, ctxt, ops)
>  #define vcpu_has_sse4_1()      vcpu_has(         1, ECX, 19, ctxt, ops)
> @@ -7434,6 +7436,14 @@ x86_emulate(
>          generate_exception_if(vex.l, EXC_UD);
>          goto simd_0f_imm8_avx;
>  
> +    case X86EMUL_OPC_66(0x0f3a, 0x44):     /* pclmulqdq $imm8,xmm/m128,xmm */
> +    case X86EMUL_OPC_VEX_66(0x0f3a, 0x44): /* vpclmulqdq 
> $imm8,xmm/m128,xmm,xmm */
> +        host_and_vcpu_must_have(pclmulqdq);
> +        if ( vex.opcx == vex_none )
> +            goto simd_0f3a_common;

What is this for?  There are no other instructions defined (that I can
find) in 0f3a44.

> +        generate_exception_if(vex.l, EXC_UD);
> +        goto simd_0f_imm8_avx;
> +
>      case X86EMUL_OPC_VEX_66(0x0f3a, 0x4a): /* vblendvps 
> {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */
>      case X86EMUL_OPC_VEX_66(0x0f3a, 0x4b): /* vblendvpd 
> {x,y}mm,{x,y}mm/mem,{x,y}mm,{x,y}mm */
>          generate_exception_if(vex.w, EXC_UD);
> --- a/xen/include/asm-x86/cpufeature.h
> +++ b/xen/include/asm-x86/cpufeature.h
> @@ -42,6 +42,7 @@
>  #define cpu_has_ssse3                boot_cpu_has(X86_FEATURE_SSSE3)
>  #define cpu_has_sse4_1               boot_cpu_has(X86_FEATURE_SSE4_1)
>  #define cpu_has_sse4_2               boot_cpu_has(X86_FEATURE_SSE4_2)
> +#define cpu_has_pclmulqdq    boot_cpu_has(X86_FEATURE_PCLMULQDQ)
>  #define cpu_has_popcnt               boot_cpu_has(X86_FEATURE_POPCNT)
>  #define cpu_has_htt          boot_cpu_has(X86_FEATURE_HTT)
>  #define cpu_has_nx           boot_cpu_has(X86_FEATURE_NX)
>
>
>


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