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Re: [Xen-devel] [v3,11/41] mips: reuse asm-generic/barrier.h

On Jan 26, 2016 23:51, "Peter Zijlstra" <peterz@xxxxxxxxxxxxx> wrote:
> So for a moment it looked like MIPS wanted to equal or surpass Alpha in
> this respect.

If there is an architecture that I'd expect to try to take the "sucks more" crown, MIPS would be it. They've already done the "worst cache award" thing, and are proud members of the "stupid branch delay slot" crowd. MIPS historically even did the "delayed load slot".

The only mistake they've never done, AFAIK, is to have a rotating register file.

At the same time, the "load-to-dependent-store" thing you really have to *work* at doing wrong. It's not enough to just have bad taste and incompetent architects. You really have to spend real effort to screw up that badly. It's really hard to do by mistake.

So I suspect that even MIPS can't get it wrong.

ÂÂ Linus

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