Re: [Xen-devel] [v3,11/41] mips: reuse asm-generic/barrier.h

[Leonid Yegoshin <Leonid.Yegoshin@xxxxxxxxxx>]

On 01/14/2016 12:48 PM, Paul E. McKenney wrote:
> So SYNC_RMB is intended to implement smp_rmb(), correct?
Yes.
> You could use SYNC_ACQUIRE() to implement read_barrier_depends() and
> smp_read_barrier_depends(), but SYNC_RMB probably does not suffice.
If smp_read_barrier_depends() is used to separate not only two reads but 
read pointer and WRITE basing on that pointer (example below) - yes. I 
just doesn't see any example of this in famous 
Documentation/memory-barriers.txt and had no chance to know what you use 
it in this way too.
> The reason for this is that smp_read_barrier_depends() must order the
> pointer load against any subsequent read or write through a dereference
> of that pointer.
I can't see that requirement anywhere in Documents directory. I mean - 
the words "write through a dereference of that pointer" or similar for 
smp_read_barrier_depends.
>    For example:
>
>         p = READ_ONCE(gp);
>         smp_rmb();
>         r1 = p->a; /* ordered by smp_rmb(). */
>         p->b = 42; /* NOT ordered by smp_rmb(), BUG!!! */
>         r2 = x; /* ordered by smp_rmb(), but doesn't need to be. */
>
> In contrast:
>
>         p = READ_ONCE(gp);
>         smp_read_barrier_depends();
>         r1 = p->a; /* ordered by smp_read_barrier_depends(). */
>         p->b = 42; /* ordered by smp_read_barrier_depends(). */
>         r2 = x; /* not ordered by smp_read_barrier_depends(), which is OK. */
>
> Again, if your hardware maintains local ordering for address
> and data dependencies, you can have read_barrier_depends() and
> smp_read_barrier_depends() be no-ops like they are for most
> architectures.
It is not so simple, I mean "local ordering for address and data 
dependencies". Local ordering is NOT enough. It happens that current 
MIPS R6 doesn't require in your example smp_read_barrier_depends() but 
in discussion it comes out that it may not. Because without 
smp_read_barrier_depends() your example can be a part of Will's 
WRC+addr+addr and we found some design which easily can bump into this 
test. And that design actually performs "local ordering for address and 
data dependencies" too.
- Leonid.


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